1、VHDL源代码计数器十五计数器library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;ENTITY fiveteencout ISPORT(clk,reset,enable : IN std_logic; count : OUT std_logic_vector(3 downto 0);END fiveteencout;ARCHITECTURE counter OF fiveteencout ISSIGNAL count_int:std_logic_vector(0 to 3);BEGINPROCESS(
2、clk,reset)BEGINWAIT UNTIL rising_edge(clk);IF reset = 1 THENcount_int 0);ELSIF enable = 1 THENIF(count_int=1110) THENcount_int=0000;ELSE count_int = count_int 1;-ELSE- NULL ;-IF (count_int=1001) THEN-count_int=0000;END IF;END IF;END PROCESS;count = count_int;- IF (reset=0) then-q=0000;-ELSIF(clkeven
3、t and clk=1) THEN-q=q 1;-IF (q=1001) then-q=0000;-END IF;-IF (reset=1)THEN-q=00;-ELSIF-wait until (clkevent and clk=1);-WAIT UNTIL (clkEVENT AND clk = 1);-WAIT UNTIL (clockEVENT AND clock = 1);- q=q 1;-end if;-count=q;- WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clo
4、ck);-clockevent and clock=1;-count = 0;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT riseedge clock = 1;-if (clockevent and clock=1) then-WAIT UNTIL rising_edge(clock);-count = 1;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock
5、);-count = 2;-end if;-end if;-end if;- END PROCESS;END counter;十四计数器library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;ENTITY fourteencout ISPORT(clk,reset,enable : IN std_logic; count : OUT std_logic_vector(3 downto 0);END fourteencout;ARCHITECTURE counter OF fourteencout ISSI
6、GNAL count_int:std_logic_vector(0 to 3);BEGINPROCESS(clk,reset)BEGINWAIT UNTIL rising_edge(clk);IF reset = 1 THENcount_int 0);ELSIF enable = 1 THENIF(count_int=1101) THENcount_int=0000;ELSEcount_int = count_int 1;-ELSE- NULL ;-IF (count_int=1001) THEN-count_int=0000;END IF;END IF;END PROCESS;count =
7、 count_int;- IF (reset=0) then-q=0000;-ELSIF(clkevent and clk=1) THEN-q=q 1;-IF (q=1001) then-q=0000;-END IF;-IF (reset=1)THEN-q=00;-ELSIF-wait until (clkevent and clk=1);-WAIT UNTIL (clkEVENT AND clk = 1);-WAIT UNTIL (clockEVENT AND clock = 1);- q=q 1;-end if;-count=q;- WAIT UNTIL clock = 1;-if (cl
8、ockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-clockevent and clock=1;-count = 0;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT riseedge clock = 1;-if (clockevent and clock=1) then-WAIT UNTIL rising_edge(clock);-count = 1;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT UNTIL clock = 1;-if (cloc
9、kevent and clock=1)then-WAIT UNTIL rising_edge(clock);-count = 2;-end if;-end if;-end if;- END PROCESS;END counter;十三计数器library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;ENTITY thireteencout ISPORT(clk,reset,enable : IN std_logic; count : OUT std_logic_vector(3 downto 0);END t
10、hireteencout;ARCHITECTURE counter OF thireteencout ISSIGNAL count_int:std_logic_vector(0 to 3);BEGINPROCESS(clk,reset)BEGINWAIT UNTIL rising_edge(clk);IF reset = 1 THENcount_int 0);ELSIF enable = 1 THENIF(count_int=1100) THENcount_int=0000;ELSEcount_int = count_int 1;-ELSE- NULL ;-IF (count_int=1001
11、) THEN-count_int=0000;END IF;END IF;END PROCESS;count = count_int;- IF (reset=0) then-q=0000;-ELSIF(clkevent and clk=1) THEN-q=q 1;-IF (q=1001) then-q=0000;-END IF;-IF (reset=1)THEN-q=00;-ELSIF-wait until (clkevent and clk=1);-WAIT UNTIL (clkEVENT AND clk = 1);-WAIT UNTIL (clockEVENT AND clock = 1);
12、- q=q 1;-end if;-count=q;- WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-clockevent and clock=1;-count = 0;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT riseedge clock = 1;-if (clockevent and clock=1) then-WAIT UNTIL rising_edge(clock);-count = 1;-WAIT UNTIL (cl
13、ockEVENT AND clock = 1);-WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-count = 2;-end if;-end if;-end if;- END PROCESS;END counter;十二计数器library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;ENTITY twelvecout ISPORT(clk,reset,enable : IN std_l
14、ogic; count : OUT std_logic_vector(3 downto 0);END twelvecout;ARCHITECTURE counter OF twelvecout ISSIGNAL count_int:std_logic_vector(0 to 3);BEGINPROCESS(clk,reset)BEGINWAIT UNTIL rising_edge(clk);IF reset = 1 THENcount_int 0);ELSIF enable = 1 THENIF(count_int=1011) THENcount_int=0000;ELSEcount_int
15、= count_int 1;-ELSE- NULL ;-IF (count_int=1001) THEN-count_int=0000;END IF;END IF;END PROCESS;count = count_int;- IF (reset=0) then-q=0000;-ELSIF(clkevent and clk=1) THEN-q=q 1;-IF (q=1001) then-q=0000;-END IF;-IF (reset=1)THEN-q=00;-ELSIF-wait until (clkevent and clk=1);-WAIT UNTIL (clkEVENT AND cl
16、k = 1);-WAIT UNTIL (clockEVENT AND clock = 1);- q=q 1;-end if;-count=q;- WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-clockevent and clock=1;-count = 0;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT riseedge clock = 1;-if (clockevent and clock=1) then-WAIT UNTIL
17、 rising_edge(clock);-count = 1;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-count = 2;-end if;-end if;-end if;- END PROCESS;END counter;十一计数器library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;ENTITY
18、 elevencout ISPORT(clk,reset,enable : IN std_logic; count : OUT std_logic_vector(3 downto 0);END elevencout;ARCHITECTURE counter OF elevencout ISSIGNAL count_int:std_logic_vector(0 to 3);BEGINPROCESS(clk,reset)BEGINWAIT UNTIL rising_edge(clk);IF reset = 1 THENcount_int 0);ELSIF enable = 1 THENIF(cou
19、nt_int=1010) THENcount_int=0000;ELSEcount_int = count_int 1;-ELSE- NULL ;-IF (count_int=1001) THEN-count_int=0000;END IF;END IF;END PROCESS;count = count_int;- IF (reset=0) then-q=0000;-ELSIF(clkevent and clk=1) THEN-q=q 1;-IF (q=1001) then-q=0000;-END IF;-IF (reset=1)THEN-q=00;-ELSIF-wait until (cl
20、kevent and clk=1);-WAIT UNTIL (clkEVENT AND clk = 1);-WAIT UNTIL (clockEVENT AND clock = 1);- q=q 1;-end if;-count=q;- WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-clockevent and clock=1;-count = 0;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT riseedge clock =
21、1;-if (clockevent and clock=1) then-WAIT UNTIL rising_edge(clock);-count = 1;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-count = 2;-end if;-end if;-end if;- END PROCESS;END counter;十计数器library ieee;use ieee.std_logic_11
22、64.all;use ieee.std_logic_unsigned.all;ENTITY count ISPORT(clk,reset,enable : IN std_logic; count : OUT std_logic_vector(3 downto 0);END count;ARCHITECTURE counter OF count ISSIGNAL count_int:std_logic_vector(0 to 3);BEGINPROCESS(clk,reset)BEGINWAIT UNTIL rising_edge(clk);IF reset = 1 THENcount_int
23、0);ELSIF enable = 1 THENIF(count_int=1001) THENcount_int=0000;ELSEcount_int = count_int 1;-ELSE- NULL ;-IF (count_int=1001) THEN-count_int=0000;END IF;END IF;END PROCESS;count = count_int;- IF (reset=0) then-q=0000;-ELSIF(clkevent and clk=1) THEN-q=q 1;-IF (q=1001) then-q=0000;-END IF;-IF (reset=1)T
24、HEN-q=00;-ELSIF-wait until (clkevent and clk=1);-WAIT UNTIL (clkEVENT AND clk = 1);-WAIT UNTIL (clockEVENT AND clock = 1);- q=q 1;-end if;-count=q;- WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-clockevent and clock=1;-count = 0;-WAIT UNTIL (clockEVENT AND cloc
25、k = 1);-WAIT riseedge clock = 1;-if (clockevent and clock=1) then-WAIT UNTIL rising_edge(clock);-count = 1;-WAIT UNTIL (clockEVENT AND clock = 1);-WAIT UNTIL clock = 1;-if (clockevent and clock=1)then-WAIT UNTIL rising_edge(clock);-count = 2;-end if;-end if;-end if;- END PROCESS;END counter;九计数器libr
26、ary ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;ENTITY ninecout ISPORT(clk,reset,enable : IN std_logic; count : OUT std_logic_vector(3 downto 0);END ninecout;ARCHITECTURE counter OF ninecout ISSIGNAL count_int:std_logic_vector(0 to 3);BEGINPROCESS(clk,reset)BEGINWAIT UNTIL risin
27、g_edge(clk);IF reset = 1 THENcount_int 0);ELSIF enable = 1 THENIF(count_int=1000) THENcount_int=0000;ELSEcount_int = count_int 1;-ELSE- NULL ;-IF (count_int=1001) THEN-count_int=0000;END IF;END IF;END PROCESS;count = count_int;- IF (reset=0) then-q=0000;-ELSIF(clkevent and clk=1) THEN-q=q 1;-IF (q=1001) then-q=0000;-END IF;-IF (reset=1)THEN-q=00;-ELSIF-wait until (clkevent and clk=1);-WAIT UNTIL (clkEVENT AND clk = 1);-WAIT UNTIL (clockEVENT AND clock =
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