FPGA的英文文献及翻译.docx

1、FPGA的英文文献及翻译Building Programmable Automation Controllers with LabVIEWFPGAOverviewProgrammableAutomation Controllers (PACs) are gaining acceptancewithin the industrial control marketasthe ideal solution for applications that require highly integrated analogand digital I/O, floating-point processing,a

2、nd seamlessconnectivity to multiple processingnodes.National Instrumentsoffers a variety of PAC solutions poweredby one common software developmentenvironment, NI LabVIEW. With LabVIEW, you can build custom I/O interfacesfor industrial applications using add-on software, such asthe NI LabVIEW FPGA M

3、odule.With the LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware, National Instrumentsdelivers an intuitive, accessiblesolution for incorporating the flexibility and customizability of FPGA technology into industrial PAC systems.You can define the logic embeddedin FPGA chips acrossthe family

4、 of RIO hardware targetswithout knowing low- level hardware description languages(HDLs) or board-level hardwaredesign details, as well asquickly define hardwarefor ultrahigh-speedcontrol, customized timing and synchronization,low-level signal processing,and custom I/O with analog,digital, and counte

5、rswithin a single device. You also can integrate your custom NI RIO hardwarewith image acquisition and analysis,motion control, and industrial protocols, such asCAN and RS232,to rapidly prototype and implement a completePAC system.Table of Contents1.Introduction2.NI RIO Hardware for PACs3.Building P

6、ACswith LabVIEW andthe LabVIEW FPGA Module4.FPGA Development Flow5.Using NI SoftMotion to CreateCustom Motion Controllers6.Applications7.ConclusionIntroductionYou can usegraphical programming in LabVIEW and the LabVIEW FPGA Module to configure the FPGA (field-programmable gate array) on NI RIO devic

7、es.RIO technology, the merging of LabVIEW graphicalprogramming with FPGAs on NI RIO hardware,provides a flexible platform for creating sophisticatedmeasurementand control systemsthat you could previously createonly with custom-designedhardware.An FPGA is a chip that con sistsof many uncon figured lo

8、gic gates.U nlike the fixed, vendor-definedfunctionality of an ASIC (application-specific integratedcircuit) chip, you can con figure an drec on figurethe logic on FPGAsfor your specific applicati on. FPGAsareused in applicationswhere either the cost of developingand fabricating an ASIC is prohibiti

9、ve, or the hardware must be rec on figured after being placed into service. The flexible, software- programmablearchitectureof FPGAs offer ben efits suchashigh-performa nceexecuti on of customalgorithms, precisetiming andsynchronization, rapid decisionmaking, and simultaneousexecutionof parallel tas

10、ks.Today,FPGAsappearin suchdevicesasinstruments, consumerelectronics,automobiles,aircraft, copy machines,andapplication-specific computerhardware.While FPGAs are ofte n used in in dustrial co ntrol products, FPGA fun ctio nality has not previously bee nm adeaccessibleto in dustrial con trol engin ee

11、rs. Defining FPGAs hashistorically requiredexpertiseusing HDL programming or complex designtools usedmore by hardwaredesignengineersthanby control engineers.With the LabVIEW FPGA Module andNI RIO hardware,you now can useLabVIEW, a high-level graphicaldevelopmentenvironmentdesignedspecifically for me

12、asurementand con trol applicatio ns,to createPACsthat havethe customizati on flexibility, an dhigh- performa nceof FPGAs. Becausethe LabVIEW FPGA Module con figures custom circuitry in hardware,your systemca n processa nd gen erates ynchroni zeda nalog and digital sig nals rapidly and deterministica

13、lly. Figure 1 illustratesmany of the NI RIO devicesthat you can con figure us ing the LabVIEW FPGA Module.Figure 1. LabVIEW FPGA VI Block Diagram and RIO Hardware PlatformsNI RIO Hardware for PACsHistorically, programmingFPGAshasbeenlimited to engineerswho havein-depth knowledgeof VHDL or other low-

14、level designtools, which requireovercoming a very steep learni ng curve. With theLabVIEW FPGA Module, NI hasope nedFPGAtech no logytoa broadersetof engineerswho cannow define FPGA logic using LabVIEW graphical development.Measurementandcontrol engineerscanfocus primarily on their test andcontrol app

15、lication, wheretheir expertiselies, ratherthanthe low-level semanticsof transferring logic into the cells of the chip. The LabVIEW FPGA Module model works becauseof the tight integration betweenthe LabVIEW FPGA Module andthe commercialoff-the-shelf (COTS) hardwarearchitectureof the FPGA and surround

16、ing I/O components.National InstrumentsPACsprovide modular, off-the-shelf platforms for your industrial control applications.With theimplementation of RIO technology on PCI, PXI, and Compact Vision Systemplatforms andthe introduction of RIO-based CompactRIO, engineersnow havethe benefits of a COTS p

17、latform with the high-performance,flexibility, and customizationbenefits of FPGAs at their disposalto build PACs.National InstrumentsPCI and PXI R Seriesplug-in devicesprovide analoganddigital dataacquisitionand control for high-performance,user-configurabletiming and synchronization, aswell as onbo

18、ard decision making on a single device. Using theseoff-the-shelf devices,you canextendyour NI PXIor PCI industrial control systemto include high-speeddiscreteand analog control, custom sensorinterfaces,and precisetiming and control.NI CompactRIO,a platform centeredonRIO technology,provides a small,

19、industrially rugged,modular PAC platform that gives you high-performanceI/O and unprecedented flexibility in systemtiming. You canuseNI CompactRIO to build an embeddedsystemfor applications such asin-vehicle dataacquisition, mobile NVH testing, and embeddedmachine control systems.The ruggedNI Compac

20、tRIO systemis industrially rated and certified, andit is designedfor greaterthan 50 g of shockat atemperaturerangeof -40to70C.NI Compact Vision Systemis a rugged machinevision packagethat withstandsthe harsh environmentscommon in robotics, automatedtest,and industrial inspection systems.NI CVS-145x

21、devices offer unprecedentedI/O capabilities andnetwork connectivity for distributed machinevision applications.NI CVS-145x systemsuseIEEE 1394 (FireWire) technology,compatible with more than40 cameraswith awide rangeof functionality, performance,and price. NI CVS-1455 and NI CVS-1456 devicescontain

22、configurable FPGAs so you can implement custom counters,timing, or motor control in your machine vision application.Building PACswith LabVIEW andthe LabVIEW FPGA ModuleWith LabVIEW and the LabVIEW FPGA Module, you addsignificant flexibility and customizationto your industrial control hardware.Becaus

23、emany PACs are already programmedusing LabVIEW, programming FPGAs with LabVIEW is easybecauseit uses the sameLabVIEW developmentenvironment. When you target the FPGA on an NI RIO device, LabVIEW displaysonly the functions that can be implementedin the FPGA, further easingthe useof LabVIEW to program

24、FPGAs. The LabVIEW FPGA Module Functions paletteincludes typical LabVIEW structuresand functions, such as While Loops, For Loops, CaseStructures,and SequenceStructuresas well as a dedicatedset of LabVIEW FPGA- specific functions for math, signal generationandanalysis,linear and nonlinear control, co

25、mparisonlogic, array and cluster manipulation, occurrences,analog and digital I/O, and timing. You canusea combination of thesefunctionsto definelogic and embedintelligence onto your NI RIO device.Figure 2 showsan FPGA application that implementsa PID control algorithm on the NI RIO hardwareanda hos

26、t application on a Windows machineoranRT targetthat com muni cateswith the NI RIO hardware.This applicati on readsfrom an alogi nputO(AIO), performsthePID calculation,andoutputstheresulting dataonanalogoutput0 (AO0). While theFPGA clock run sat 40 MHz the loop i n this exampler un s much slower beca

27、useeach componenttakeslongerthan one-clockcycle to execute.Analog control loops can run on an FPGA at a rate of about200 kHz. You can specify the clock rate at compile time. This exampleshowso nly on e PID loop; however,creat in gadditi on al f un cti on ality on the NI RIO device is merely a matter

28、 of adding anotherWhile Loop. Unlike traditional PC processors, FPGAs are parallel processorsAdd ing additi on al loops to your applicati on does not affect the performanceof your PID loop.LabVIEW FPGA VILabVIEW Host V!Figure 2. PID Control Using an Embedded LabVIEW FPGA VI with Corresponding LabVIE

29、W Host VI.FPGA DevelopmentFlowAfter you createthe LabVIEW FPGA VI, you compile the code to run on the NI RIO hardware.Depending on the complexity of your code andthespecificationsof your developmentsystem,compiletime for an FPGA VI can rangefrom minutesto several hours.To maximize developmentproduct

30、ivity, with the R SeriesRIO devicesyou canusea bit- accurateemulation modesoyou canverify the logic of your designbeforeinitiating the compile process.Whenyou targetthe FPGA Device Emulator, LabVIEW accesses/O from thedeviceand executesthe VI logic on the Windows developmentcomputer.ln this mode, yo

31、u can usethe samedebuggingtools available in LabVIEW for Windows, such asexecution highlighting, probes, and breakpoints.Oncethe LabVIEW FPGA codeis compiled, you createa LabVIEW host VI to integrate your NI RIO hardware into the restof your PAC system.Figure 3 illustrates the development processfor

32、 creatingan FPGA application. The host VI usescontrols andindicators on the FPGA VI front paneltotransferdatabetweentheFPGA on the RIO device andthehost process ingengin e.Thesefr ont pan el objects are represe ntedasdataregisterswithi n the FPGA. ThehostcomputercanbeeitheraPCor PXI controller runni

33、ng Windows or aPC, PXI controller, CompactVision System,or CompactRIO controller running a real-time operatingsystem(RTOS).ln theaboveexample,we exchangethesetpoint, PID gains,loop rate,AI0, andAO0 datawith the LabVIEW hostVI.Creals FPGA VIEmukt* An Pt to恒針(R Series onlyiCompile to FPGACreald Hcot Vl(s)