电气自动化 专业 毕业设计英文翻译.docx

电气自动化 专业 毕业设计英文翻译.docx

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电气自动化专业毕业设计英文翻译

Computercontroltechnology

1Computerstructureandfunction

Thissectionintroducestheinternalarchitectureofacomputeranddescribeshowinstructionsarestoredandinterpretedandexplainshowtheinstructionexecutioncycleisbrokendownintoitsvariouscomponents.

Atthemostbasiclevel,acomputersimplyexecutesbinary-codedresults.Forageneral-purposeprogrammablecomputer,fournecessaryelementsarethememory,centralprocessingunit（CPU,orsimplyprocessor）,anexternalprocessorbus,andaninput/outputsystemasindicatedinFig.3-1A-1.

Fig.3-1A-1Basicelementsofacomputer

Thememorystoresinstructionsanddata.

TheCPUreadsandinterpretstheinstructions,readsthedatarequiredbyeachinstruction,executestheactionrequiredbytheinstruction,andstorestheresultsbackinmemory.OneoftheactionsthatisrequiredoftheCPUistoreaddatafromorwritedatatoanexternaldevice.Thisiscarriedoutusingtheinput/outputsystem.

Theexternalprocessorbusisasetofelectricconductorsthatcarriesdata,addressandcontrolinformationbetweentheothercomputerelements.

1-1Thememory

Thememoryofacomputerconsistsofasetofsequentiallynumberedlocations.Eachlocationisaregisterinwhichbinaryinformationcanbestored.The“number”ofalocationiscalleditsaddress.Thelowestaddressis0.Themanufacturerdefinesawordlengthfortheprocessorthatisanintegralnumberoflocationslong.Ineachwordthebitscanrepresenteitherdataorinstructions.FortheIntel8086/87andMotorolaMC6800microprocessors,awordis16bitslong,buteachmemorylocationhasonly8bitsandthustwo8-bitlocationsmustbeaccessedtoobtaineachdataword.

Inordertousethecontentsofmemory,theprocessormustfetchthecontentsoftherightlocation.Tocarryoutafetch,theprocessorplaces（enables）thebinary-codedaddressofthedesiredlocationontotheaddresslinesoftheexternalprocessorbus.Thememorythenallowsthecontentsoftheaddressedmemorylocationtobereadbytheprocessor.Theprocessoffetchingthecontentsofamemorylocationdoesnotalterthecontentsofthatlocation.

InstructionsinmemoryInstructionsstoredinmemoryarefetchedbytheCPUandunlessprogrambranchesoccur,theyareexecutedinthesequencetheyappearinmemory.Aninstructionwrittenasabinarypatterniscalledamachine-languageinstruction.OnewaytoachievemeaningfulpatternsistodivideupthebitsintofieldsasindicatedinFig.3-1A-2,witheachfieldcontainingacodeforadifferenttypeofinformation.

Fig.3-1A-2Arrangementofprogramanddatainmemory

Eachinstructioninoursimplecomputercanbedividedupintofourfieldsof4bitseach.Eachinstructioncancontainoperationcode（oropcode,eachinstructionhasauniqueopcode）,operandaddress,immediateoperands,branchaddress.

Inarealinstructionsettherearemanymoreinstructions.Thereisalsoamuchlargenumberofmemorylocationsinwhichtostoreinstructionsanddata.Inordertoincreasethenumberofmemorylocations,theaddressfieldsandhencetheinstructionsmustbelongerthan16bitsifweusethesameapproach.Thereareanumberofwaystoincreasetheaddressingrangeofthemicroprocessorwithoutincreasingtheinstructionlength:

variableinstructionfield,multiwordinstructions,multipleaddressingmodes,variableinstructionlength.Wewillnotdiscussthemindetail.

Datainmemorydataisinformationthatisrepresentedinmemoryasacode.Forefficientuseofthememoryspaceandprocessingtime,mostcomputersprovidethecapabilityofmanipulatingdataofdifferentlengthsandrepresentationsinmemory.Thevariousdifferentrepresentationsrecognizedbytheprocessorarecalleditsdatatypes.Thedatatypesnormallyusedare:

bit,binary-codeddecimaldigit（4-bitnibble,BCD）,byte（8bits）,word（2bytes）,doubleword（4bytes）.

Someprocessorsprovideinstructionsthatmanipulateotherdatatypessuchassingle-precisionfloating-pointdatatypes（32bits）anddouble-precisionfloating-pointdatatypes（64bits）.Thereisanothertypeofdata—characterdata.Itisalsousuallyrepresentedin8bits.Eachcomputerterminalkeyandkeycombination（suchasshiftandcontrolfunctions）onastandardterminalkeyboardhasa7-bitscodedefinedbytheAmericanStandardCodeforInformationInterchange（ASCII）.

TypeofmemoryIntheapplicationsofdigitalcontrolsystem,wealsoconcernedwiththecharacteristicsofdifferentmemorytechniques.Forprimarymemory,weneedittobestoredinformationtemporarilyandtobewrittenandgotinformationfromsuccessiveorfromwidelydifferentlocations.Thistypememoryiscalledrandom-accessmemory（RAM）.Insomecasewedonotwanttheinformationinmemorytobelost.Sowearewillingtousespecialtechniquestowriteintomemory.Ifwritingisaccomplishedonlyoncebyphysicallychangingconnections,thememoryiscalledaread-onlymemory（ROM）.Iftheinterconnectionpatterncanbeprogrammedtobeset,thememoryiscalledaprogrammableread-onlymemory（PROM）.Ifrewritingcanbeaccomplishedwhenitisnecessary,wehaveanerasableprogrammableread-onlymemory（EPROM）.AnelectronicallyerasablePROMisabbreviatedEEPROM.

1-2TheCPU

TheCPU’sjobistofetchinstructionsfrommemoryandexecutetheseinstructions.ThestructureoftheCPUisshowninFig.3-1A-3.Ithasfourmaincomponents:

anarithmeticandlogicalunit（ALU）,asetofregisters,aninternalprocessorbusandcontroller.

Fig.3-1A-3Centralprocessingunit（CPU）

TheseandothercomponentsoftheCPUandtheirparticipationintheinstructioncyclearedescribedinthefollowingsections.

ArithmeticandLogicalUnit（ALU）TheALUprovidesawidearithmeticoperations,includingadd,subtract,multiply,anddivide.ItcanalsoperformBooleanlogicoperationssuchasAND,OR,andCOMPLEMENTonbinarydata.Otheroperations,suchaswordcompares,arealsoavailable.ThemajorityofcomputertasksinvolvetheALU,butagreatamountofdatamovementisrequiredinordertomakeuseoftheALUinstructions.

RegistersAsetofregistersinsidetheCPUinusedtostoreinformation.

InstructionregisterWhenaninstructionisfetched,itiscopiedintotheinstructionregister,whereitisdecoded.Decodingmeansthattheoperationcodeisexaminedandusedtodeterminethestepsoftheexecutionsequence.

Programmer’smodeloftheCPUThecollectionofregistersthatcanbeexaminedormodifiedbyaprogrammeriscalledtheprogrammer’smodeloftheCPU.Theonlyregistersthatcanbemanipulatedbytheinstructionset,orarevisiblyaffectedbyhardwareinputsortheresultsofoperationsupondata,aretheregistersrepresentedinthemodel.

FlagregisterTheexecutionsequenceisdeterminednotonlybytheinstructionbutalsobytheresultsofthepreviousinstructions.Forexample,ifanadditioniscarriedoutintheALU,dataontheresultoftheaddition（whethertheresultispositive,negative,orzero,forexample）isstoredinwhatisknownasaflagregister,statusregister,orconditionregister.Ifthenextinstructionisaconditionalbranchinstruction,theflagwordistestedinthatinstructiontodetermineifabranchifabranchisrequired.

Programcounter（instructionpointer）Theaddressofthenextinstructionislocatedinaregistercalledtheprogramcounter.

DataregistersWhenaninstructionusestheregisterstostoredata,thereferencetotheregisterintheinstructioniscalledregisteraddressing.Thereasonsofmakinguseoftheinternalregisterstostoredataarethattheycanmaketheinstructionsshorterandmakeexecutionfaster.

AddressregistersTheinternalregisterscanalsobeusedforthestorageofaddressofdatainmemorydata.Insuchacase,theinstructionwordcontainsaregisternumber（i.e.aregisteraddress）.Intheregisteriscontainedtheaddressofmemorydatatobeusedintheinstruction.Thisformofaddressingiscalledregisterindirectaddressing.Thecontentsoftheregisteraresaidtopointtothedatainmemory.

InternalProcessorBusTheinternalprocessorbusmovesdatabetweeninternalregister.Abusisasetofcloselygroupedelectricconductorsthattransfersdata,address,andcontrolinformationbetweenfunctionalblocksoftheCPU.Datafromasourceregistercanbepassedtoadestinationregisterwhenbothareenabledonto（connectedto）thebus.

ControllerThecontrollerprovidesthepropersequenceofcontrolsignalsforeachinstructioninaprogramcycletobefetchedfrommemory.Atotalprogramcyclecomprisesmanyinstructioncycle,eachinstructioncyclecanbedividedupintoitscomponentmachinecyclesandeachmachinecyclecomprisesanumberofclockcycle.

Inordertofetchaninstruction,forexampleillustratedinFig.3-1A-4,theaddressintheprogramcounterisplacedontheaddresslinesoftheexternalbus（AB）attheonsetofclockcycleC1.Simultaneously,usingacodeonthecontrollinesofthebus（CB）,theCPUinformsalldevicesattachedtothebusthatan“opcode”fetchmachinecycleisbeingexecutedbytheCPU.Thememoryallowsthememoryaddresstoselectthememorylocationcontainingtheinstruction.AtC2thecontrollerplacesa“read”commandontothecontrolbuswhichallowsthememorydatatobeplacedontothedatabus.ThecontrollerthengatesthedataintotheinstructionregisterandremovesthereadcommandfromthecontrolbusinC3.AtC4,thecontrollerremovestheaddressfromtheaddressbusandbeginstodecodetheoperation-codeportionoftheinstructiontoseewhatstepsarerequiredforexecution.Thedecodingoperationmaytakeseveralmoreclockcycleattheendofwhic