一篇关于FPGA的英文文献及翻译.docx

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一篇关于FPGA的英文文献及翻译.docx

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一篇关于FPGA的英文文献及翻译.docx

一篇关于FPGA的英文文献及翻译

使用LabVIEWFPGA模块开发可编程自动化控制器

 

BuildingProgrammableAutomationControllerswithLabVIEWFPGA

Overview

ProgrammableAutomationControllers(PACs)aregainingacceptancewithintheindustrialcontrolmarketastheidealsolutionforapplicationsthatrequirehighlyintegratedanaloganddigitalI/O,floating-pointprocessing,andseamlessconnectivitytomultipleprocessingnodes.NationalInstrumentsoffersavarietyofPACsolutionspoweredbyonecommonsoftwaredevelopmentenvironment,NILabVIEW.WithLabVIEW,youcanbuildcustomI/Ointerfacesforindustrialapplicationsusingadd-onsoftware,suchastheNILabVIEWFPGAModule.

WiththeLabVIEWFPGAModuleandreconfigurableI/O(RIO)hardware,NationalInstrumentsdeliversanintuitive,accessiblesolutionforincorporatingtheflexibilityandcustomizabilityofFPGAtechnologyintoindustrialPACsystems.YoucandefinethelogicembeddedinFPGAchipsacrossthefamilyofRIOhardwaretargetswithoutknowinglow-levelhardwaredescriptionlanguages(HDLs)orboard-levelhardwaredesigndetails,aswellasquicklydefinehardwareforultrahigh-speedcontrol,customizedtimingandsynchronization,low-levelsignalprocessing,andcustomI/Owithanalog,digital,andcounterswithinasingledevice.YoualsocanintegrateyourcustomNIRIOhardwarewithimageacquisitionandanalysis,motioncontrol,andindustrialprotocols,suchasCANandRS232,torapidlyprototypeandimplementacompletePACsystem.

TableofContents

1.Introduction

2.NIRIOHardwareforPACs

3.BuildingPACswithLabVIEWandtheLabVIEWFPGAModule

4.FPGADevelopmentFlow

5.UsingNISoftMotiontoCreateCustomMotionControllers

6.Applications

7.Conclusion

Introduction

YoucanusegraphicalprogramminginLabVIEWandtheLabVIEWFPGAModuletoconfiguretheFPGA(field-programmablegatearray)onNIRIOdevices.RIOtechnology,themergingofLabVIEWgraphicalprogrammingwithFPGAsonNIRIOhardware,providesaflexibleplatformforcreatingsophisticatedmeasurementandcontrolsystemsthatyoucouldpreviouslycreateonlywithcustom-designedhardware.

AnFPGAisachipthatconsistsofmanyunconfiguredlogicgates.Unlikethefixed,vendor-definedfunctionalityofanASIC(application-specificintegratedcircuit)chip,youcanconfigureandreconfigurethelogiconFPGAsforyourspecificapplication.FPGAsareusedinapplicationswhereeitherthecostofdevelopingandfabricatinganASICisprohibitive,orthehardwaremustbereconfiguredafterbeingplacedintoservice.Theflexible,software-programmablearchitectureofFPGAsofferbenefitssuchashigh-performanceexecutionofcustomalgorithms,precisetimingandsynchronization,rapiddecisionmaking,andsimultaneousexecutionofparalleltasks.Today,FPGAsappearinsuchdevicesasinstruments,consumerelectronics,automobiles,aircraft,copymachines,andapplication-specificcomputerhardware.WhileFPGAsareoftenusedinindustrialcontrolproducts,FPGAfunctionalityhasnotpreviouslybeenmadeaccessibletoindustrialcontrolengineers.DefiningFPGAshashistoricallyrequiredexpertiseusingHDLprogrammingorcomplexdesigntoolsusedmorebyhardwaredesignengineersthanbycontrolengineers.

WiththeLabVIEWFPGAModuleandNIRIOhardware,younowcanuseLabVIEW,ahigh-levelgraphicaldevelopmentenvironmentdesignedspecificallyformeasurementandcontrolapplications,tocreatePACsthathavethecustomization,flexibility,andhigh-performanceofFPGAs.BecausetheLabVIEWFPGAModuleconfigurescustomcircuitryinhardware,yoursystemcanprocessandgeneratesynchronizedanaloganddigitalsignalsrapidlyanddeterministically.Figure1illustratesmanyoftheNIRIOdevicesthatyoucanconfigureusingtheLabVIEWFPGAModule.

Figure1.LabVIEWFPGAVIBlockDiagramandRIOHardwarePlatforms

NIRIOHardwareforPACs

Historically,programmingFPGAshasbeenlimitedtoengineerswhohavein-depthknowledgeofVHDLorotherlow-leveldesigntools,whichrequireovercomingaverysteeplearningcurve.WiththeLabVIEWFPGAModule,NIhasopenedFPGAtechnologytoabroadersetofengineerswhocannowdefineFPGAlogicusingLabVIEWgraphicaldevelopment.Measurementandcontrolengineerscanfocusprimarilyontheirtestandcontrolapplication,wheretheirexpertiselies,ratherthanthelow-levelsemanticsoftransferringlogicintothecellsofthechip.TheLabVIEWFPGAModulemodelworksbecauseofthetightintegrationbetweentheLabVIEWFPGAModuleandthecommercialoff-the-shelf(COTS)hardwarearchitectureoftheFPGAandsurroundingI/Ocomponents.

NationalInstrumentsPACsprovidemodular,off-the-shelfplatformsforyourindustrialcontrolapplications.WiththeimplementationofRIOtechnologyonPCI,PXI,andCompactVisionSystemplatformsandtheintroductionofRIO-basedCompactRIO,engineersnowhavethebenefitsofaCOTSplatformwiththehigh-performance,flexibility,andcustomizationbenefitsofFPGAsattheirdisposaltobuildPACs.NationalInstrumentsPCIandPXIRSeriesplug-indevicesprovideanaloganddigitaldataacquisitionandcontrolforhigh-performance,user-configurabletimingandsynchronization,aswellasonboarddecisionmakingonasingledevice.Usingtheseoff-the-shelfdevices,youcanextendyourNIPXIorPCIindustrialcontrolsystemtoincludehigh-speeddiscreteandanalogcontrol,customsensorinterfaces,andprecisetimingandcontrol.

NICompactRIO,aplatformcenteredonRIOtechnology,providesasmall,industriallyrugged,modularPACplatformthatgivesyouhigh-performanceI/Oandunprecedentedflexibilityinsystemtiming.YoucanuseNICompactRIOtobuildanembeddedsystemforapplicationssuchasin-vehicledataacquisition,mobileNVHtesting,andembeddedmachinecontrolsystems.TheruggedNICompactRIOsystemisindustriallyratedandcertified,anditisdesignedforgreaterthan50gofshockatatemperaturerangeof-40to70°C.

NICompactVisionSystemisaruggedmachinevisionpackagethatwithstandstheharshenvironmentscommoninrobotics,automatedtest,andindustrialinspectionsystems.NICVS-145xdevicesofferunprecedentedI/Ocapabilitiesandnetworkconnectivityfordistributedmachinevisionapplications.NICVS-145xsystemsuseIEEE1394(FireWire)technology,compatiblewithmorethan40cameraswithawiderangeoffunctionality,performance,andprice.NICVS-1455andNICVS-1456devicescontainconfigurableFPGAssoyoucanimplementcustomcounters,timing,ormotorcontrolinyourmachinevisionapplication.

BuildingPACswithLabVIEWandtheLabVIEWFPGAModule

WithLabVIEWandtheLabVIEWFPGAModule,youaddsignificantflexibilityandcustomizationtoyourindustrialcontrolhardware.BecausemanyPACsarealreadyprogrammedusingLabVIEW,programmingFPGAswithLabVIEWiseasybecauseitusesthesameLabVIEWdevelopmentenvironment.WhenyoutargettheFPGAonanNIRIOdevice,LabVIEWdisplaysonlythefunctionsthatcanbeimplementedintheFPGA,furthereasingtheuseofLabVIEWtoprogramFPGAs.TheLabVIEWFPGAModuleFunctionspaletteincludestypicalLabVIEWstructuresandfunctions,suchasWhileLoops,ForLoops,CaseStructures,andSequenceStructuresaswellasadedicatedsetofLabVIEWFPGA-specificfunctionsformath,signalgenerationandanalysis,linearandnonlinearcontrol,comparisonlogic,arrayandclustermanipulation,occurrences,analoganddigitalI/O,andtiming.YoucanuseacombinationofthesefunctionstodefinelogicandembedintelligenceontoyourNIRIOdevice.

Figure2showsanFPGAapplicationthatimplementsaPIDcontrolalgorithmontheNIRIOhardwareandahostapplicationonaWindowsmachineoranRTtargetthatcommunicateswiththeNIRIOhardware.Thisapplicationreadsfromanaloginput0(AI0),performsthePIDcalculation,andoutputstheresultingdataonanalogoutput0(AO0).WhiletheFPGAclockrunsat40MHztheloopinthisexamplerunsmuchslowerbecauseeachcomponenttakeslongerthanone-clockcycletoexecute.AnalogcontrolloopscanrunonanFPGAatarateofabout200kHz.Youcanspecifytheclockrateatcompiletime.ThisexampleshowsonlyonePIDloop;however,creatingadditionalfunctionalityontheNIRIOdeviceismerelyamatterofaddinganotherWhileLoop.UnliketraditionalPCprocessors,FPGAsareparallelprocessors.AddingadditionalloopstoyourapplicationdoesnotaffecttheperformanceofyourPIDloop.

Figure2.PIDControlUsinganEmbeddedLabVIEWFPGAVIwithCorrespondingLabVIEWHostVI.

FPGADevelopmentFlow

AfteryoucreatetheLabVIEWFPGAVI,youcompilethecodetorunontheNIRIOhardware.Dependingonthecomplexityofyourcodeandthespecificationsofyourdevelopmentsystem,compiletimeforanFPGAVIcanrangefromminutestoseveralhours.Tomaximizedevelopmentproductivity,withtheRSeriesRIOdevicesyoucanuseabit-accurateemulationmodesoyoucanverifythelogicofyourdesignbeforeinitiatingthecompileprocess.WhenyoutargettheFPGADeviceEmulator,LabVIEWaccessesI/OfromthedeviceandexecutestheVIlogicontheWindowsdevelopmentcomputer.Inthismode,youcanusethesamedebuggingtoolsavailableinLabVIEWforWindows,suchasexecutionhighlighting,probes,andbreakpoints.

OncetheLabVIEWFPGAcodeiscompiled,youcreateaLabVIEWhostVItointegrateyourNIRIOhardwareintotherestofyourPACsystem.Figure3illustratesthedevelopmentprocessforcreatinganFPGAapplication.ThehostVIusescontrolsandindicatorsontheFPGAVIfrontpaneltotransferdatabetweentheFPGAontheRIOdeviceandthehostprocessingengine.ThesefrontpanelobjectsarerepresentedasdataregisterswithintheFPGA.ThehostcomputercanbeeitheraPCorPXIcontrollerrunning

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