外文翻译采用高性能的静态80C51设计的单片机.docx

外文翻译采用高性能的静态80C51设计的单片机.docx

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外文翻译采用高性能的静态80C51设计的单片机

附录III外文资料

英文文献

TheAT89C51isalow-power,high-performanceCMOS8-bitmicrocomputerwith4KbytesofFlashprogrammableanderasablereadonlymemory（PEROM）.ThedeviceismanufacturedusingAtmel’shigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindustry-standardMCS-51instructionsetandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedinsystemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theAtmelAT89C51isapowerfulmicrocomputerwhichprovidesahighlyflexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.

Features

*CompatiblewithMCS-51Products

*4KBytesofIn-SystemReprogrammableFlashMemory

–Endurance:

1,000Write/EraseCycles

*FullyStaticOperation:

0Hzto24MHz

*Three-levelProgramMemoryLock

*128x8-bitInternalRAM

*32ProgrammableI/OLines

*Two16-bitTimer/Counters

*SixInterruptSources

*ProgrammableSerialChannel

*Low-powerIdleandPower-downModes

TheAT89C51providesthefollowingstandardfeatures:

4KbytesofFlash,128bytesofRAM,32I/Olines,two16-bittimer/counters,afivevectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillatorandclockcir-cuitry.Inaddition,theAT89C51isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleMode

stopstheCPUwhileallowingtheRAM,timer/counters,serialportandinterruptsystemtocontinuefunctioning.ThePower-downModesavestheRAMcontentsbutfreezestheoscillatordisablingallotherchipfunctionsuntilthenexthardwarereset.

PinDescription

VCC

Supplyvoltage.

GND

Ground.

Port0

Port0isan8-bitopen-drainbi-directionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashigh-impedanceinputs.

Port0mayalsobeconfiguredtobethemultiplexedloworderaddress/databusduringaccessestoexternalprogramanddatamemory.InthismodeP0hasinternalpullups.

Port0alsoreceivesthecodebytesduringFlashprogram-

ming,andoutputsthecodebytesduringprogramverification.Externalpullupsarerequiredduringprogramverification.

Port1

Port1isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,

Port1pinsthatareexternallybeingpulledlowwillsourcecurrent（I）becauseoftheinternalpullups.

Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.

Port2

Port2isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent（I）becauseoftheinternalpullups.

Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorythatuse16-bitaddresses（MOVX@DPTR）.Inthisapplication,itusesstronginternalpullupswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses（MOVX@RI）,Port2emitsthecontentsoftheP2SpecialFunctionRegister.

Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.

Port3

Port3isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pinstheyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent（I）becauseofthepullups.

Port3alsoservesthefunctionsofvariousspecialfeatures

oftheAT89C51aslistedbelow:

PortPinAlternateFunctions

P3.0RXD（serialinputport）

P3.1TXD（serialoutputport）

P3.2INT0（externalinterrupt0）

P3.3INT1（externalinterrupt1）

P3.4T0（timer0externalinput）

P3.5T1（timer1externalinput）

P3.6WR（externaldatamemorywritestrobe）

P3.7RD（externaldatamemoryreadstrobe）

Port3alsoreceivessomecontrolsignalsforFlashpro-

grammingandverification.

RST

Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.

ALE/PROG

AddressLatchEnableoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput（PROG）duringFlashprogramming.

InnormaloperationALEisemittedataconstantrateof1/6theoscillatorfrequency,andmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeachaccesstoexternalDataMemory.

Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.

PSEN

ProgramStoreEnableisthereadstrobetoexternalprogrammemory.

WhentheAT89C51isexecutingcodefromexternalprogrammemory,PSENisactivatedtwiceeachmachinecycle,exceptthattwoPSENactivationsareskippedduringeachaccesstoexternaldatamemory.

EA/VPP

ExternalAccessEnable.EAmustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFH.

Note,however,thatiflockbit1isprogrammed,EAwillbeinternallylatchedonreset.

EAshouldbestrappedtoVCCforinternalprogramexecutions.

Thispinalsoreceivesthe12-voltprogrammingenablevoltage（VPP）duringFlashprogramming,forpartsthatrequire12-voltVPP

XTAL1

Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.

XTAL2

Outputfromtheinvertingoscillatoramplifier.OscillatorCharacteristics

XTAL1andXTAL2aretheinputandoutput,respectively,ofaninvertingamplifierwhichcanbeconfiguredforuseasanon-chiposcillator,asshowninFigure1.Eitheraquartzcrystalorceramicresonatormaybeused.Todrivethedevicefromanexternalclocksource,XTAL2shouldbeleftunconnectedwhileXTAL1isdrivenasshowninFigure2.Therearenorequirementsonthedutycycleoftheexternalclocksignal,sincetheinputtotheinternalclockingcircuitryisthroughadivide-by-twoflip-flop,butminimumandmaximumvoltagehighandlowtimespecificationsmustbeobserved.

IdleMode

Inidlemode,theCPUputsitselftosleepwhilealltheon-chipperipheralsremainactive.Themodeisinvokedbysoftware.Thecontentoftheon-chipRAMandallthespecialfunctionsregistersremainunchangedduringthismode.Theidlemodecanbeterminatedbyanyenabledinterruptorbyahardwarereset.

Itshouldbenotedthatwhenidleisterminatedbyahardwarereset,thedevicenormallyresumesprogramexecution,fromwhereitleftoff,uptotwomachinecyclesbeforetheinternalresetalgorithmtakescontrol.On-chiphardwareinhibitsaccesstointernalRAMinthisevent,butaccesstotheportpinsisnotinhibited.ToeliminatethepossibilityofanunexpectedwritetoaportpinwhenIdleisterminatedby

reset,theinstructionfollowingtheonethatinvokesIdleshouldnotbeonethatwritestoaportpinortoexternalmemory.

Power-downMode

Inthepower-downmode,theoscillatorisstopped,andtheinstructionthatinvokespower-downisthelastinstructionexecuted.Theon-chipRAMandSpecialFunctionRegistersretaintheirvaluesuntilthepower-downmodeisterminated.Theonlyexitfrompower-downisahardwarereset.ResetredefinestheSFRsbutdoesnotchangetheon-chipRAM.TheresetshouldnotbeactivatedbeforeVCCisrestoredtoitsnormaloperatinglevelandmustbeheldactivelongenoughtoallowtheoscillatortorestartandstabilize.

ProgramMemoryLockBits

Onthechiparethreelockbitswhichcanbeleftunprogrammed（U）orcanbeprogrammed（P）toobtaintheadditionalfeatureslistedinthetablebelow.

Whenlockbit1isprogrammed,thelogiclevelattheEApinissampledandlatchedduringreset.Ifthedeviceispoweredupwithoutareset,thelatchinitializestoarandomvalue,andholdsthatvalueuntilresetisactivated.ItisnecessarythatthelatchedvalueofEAbeinagreementwiththecurrentlogiclevelatthatpininorderforthedevicetofunctionproperly.

ProgrammingtheFlash

TheAT89C51isnormallyshippedwiththeon-chipFlashmemoryarrayintheerasedstate（thatis,contents=FFH）andreadytobeprogrammed.Theprogramminginterfaceacceptseitherahigh-voltage（12-volt）oralow-voltage（VCC）programenablesignal.Thelow-voltageprogrammingmodeprovidesaconvenientwaytoprogramtheAT89C51insidetheuser’ssystem,whilethehigh-voltageprogrammingmodeiscompatiblewithconventionalthird-partyFlashorEPROMprogrammers.

TheAT89C51isshippedwitheitherthehigh-voltageorlow-voltageprogrammingmodeenabled.Therespectivetop-sidemarkinganddevicesignaturecodesarelistedinthefollowingtable.

TheAT89C51codememoryarrayisprogrammedbyte-by-byteineitherprogrammingmode.Toprogramanynon-blankbyteintheon-chipFlashMemory,theentirememorymustbeerasedusingtheChipEraseMode.

ProgrammingAlgorithm:

BeforeprogrammingtheAT89C51,theaddress,dataandcontrolsignalsshouldbesetupaccordingtotheFlashprogrammingmodetableand

Figure3andFigure4.ToprogramtheAT89C51,takethefollowingsteps.

1.Inputthedesiredmemorylocationon