PONMAC芯片BL介绍.doc

PONMAC芯片BL介绍.doc

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PONMAC芯片（DS-BL2000）介绍

1、主要接口

1.1数字接口

lDualFastEthernet10/100（IEEE802.3/802.3u）

lGigabitEthernet10/100/1000（IEEE802.3ab/802.3z）

lNativeTDMGEMInterface

lPeripheralBusInterface（PBI）forgluelessinterfacetocommonindustry

1.2光接口

nIntegrated2488/1244MbpsCDR

nGluelessinterfacetoBPONandGPONMulti-SourceAgreement（MSA）SmallFormFactor（SFF）transceivers

1.3TDM接口

nTDMInterface

nNativeTDMoverGEMviaancompanionFPGA

2、以太网MAC

2.1配置以太网接口

lFastEthernet10/100（IEEE802.3/802.3u）

MIIordualRMIIMACInterface

Halfandfullduplexsupport

lGigabitEthernet10/100/1000（IEEE802.3ab/802.3z）

GMIIMACInterface

lConfigurable802.3xhardwareflowcontrol

lIEEE802.1qVLANtagging

2.2、GPONMAC

lTheGPONMACsupportsEthernetpacketandTDMpayloadtransportoverthePONinterfacethroughGPONEncapsulationMode（GEM）.ItsupportsITU-TG.984.xsetofstandardswithextendedfunctionalities

lComplianttoG.984.x

lMultipledatarates

lConfigurableAESencryptiononDSpayload

lConfigurableFEConUSandDSpayload

lDedicatedconnectionsforIn-bandmanagementcanbedirectedtoCPU

2.3、BPONMAC

BroadLight’sITU-TG.983MACisindustryprovenandFSANinteroperable.

lG.983.1compliant

lG.983.2（OMCI）compliant

lG.983.4（DBA）compliant

lMultipledatarates

lQueuemanager

l32VP/VCgroupfilters

lATMcellprocessingwithend-to-endOAMperI.610

lDerivesclockfromrecoverednetworkclock

2.4、CDR,SerDes

lPCMLTXandLVPECLRXinterfacelevels

lVariableDatarates

lSelectablereferenceclockfrequency78MHzor155MHz

lIntegratedon-chip50Ωterminationresistorinthetransmitterandinthereceiver

3、Cell/PacketProcessor

信源、包处理引蟼是为了优化GPON或者BPON数据平台流处理器。

信源、包处理引蟼包括：

AAL5-SAR，AAL2-SAR，802.1d-bridge学习，ATM整形和策略。

包含核心处理和硬件加速器，在时钟频率为200MHz可达到300Kpackets/s。

3.1固件

lSupportsupto100MbpsfullduplexsustainedEthernettrafficwith64-bytepackets

lSupportfor512filteringtableentries

lSupportfor802.1p,802.1qand802.1D

lATMcellprocessingandEthernetpacketprocessingusingAAL5adaptationmethod

lSupportofRFC-2684withVCmultiplexingorLLCencapsulation

3.2硬件

l32-bitinstructionsandregisterdatawidth

lThirtytwogeneralpurposeregisters

l16KBinstructionaddressspace

l48KBmemorydataspace

l256addressesforI/Odataspace（usedbyHWaccelerators）

lSeveraldataaddressingmodes

l32-bitALUand32-bitshiftunit

lBytemaskoperations

l32-bitaccumulatorregisterusedasoutputforeachpartoftheexecutionunit

lSpecialinstructionsforactivatingHWacceleratorsandnetworkingpurposessuchasscheduling

4、核心处理单元

TheBL2000’sembeddedCPUisageneralpurposeMIPS32basedcontrollerthatprovidescontrolplanefunctionalityfortheONTsystemandforPONoperation。

5、MIPS子系统

l32-bit4KEcRISCcore

l16KBI-Cache,8KBD-Cache

lMemoryManagementUnit（MMU）

lSingle-steppingoftheprocessoraswellasinstructionanddatavirtualaddressbeakpointsviaEJTAG

6、系统接口单元（SIU）

6.1ProgrammableGeneralPurposeI/O（GPIO）

l21BidirectionalGeneralPurposeI/O

l3.3Vtolerantinputs

lTTL/Opencollectoroutputs

l4mAcurrenttodriveLEDs

6.2PeripheralBusInterface（PBI）

l24-bitaddressbusclockedupto66MHz

lConfigurablebusclock（BUSCLK）:

ratesof20MHz,25MHz,33MHz,50MHz,and66MHz

lConfigurablewaitstatesofupto20BUSCLKcycles

lPeripheralbyteaccesssupport

lSupportforasynchronousandsynchronousbusaccesses

lConfigurableassertion,de-assertion,andpolarityforCS,RW,andTS

6.3InterruptController

lServicingupto6edgeorlevelexternalsourcesand21internalsources.

lDifferentinterruptprioritylevels

lProgrammableprioritylevelandmaskperinterruptsource

6.4UART

l32-Bytebuffers

lSelectablebaudratefrom9600Bytes–115.2KBytes

6.5I2C

lMastertransmitterandreceiver

l32-Bytebuffers

lSupportofinter-bitandinter-byteclockstretching

6.6SerialPeripheralInterface（SPI）

lLimitedtocontrolplaneapplications

lOperationinmastermode

lFullduplexmastertransmit/receive

6.7Timers

lConfigurableSWwatchdogtimer

lThreegeneralpurpose32-bittimers

6.8PowerManagement

lSleepmode（OutgoingCallsOnly）

lLowPowerMode（Lifeline）

6.9ExternalMemory

l200MHzDDR2SDRAM

l16-bitdatabus

6.10JTAG

lIEEE1149.1compliant,JTAGboundaryscan

7、物理层说明

1.Voltages

lCore1.2V±5%

lI/O2.5V±0.2V（3.3Vtolerant）

lDDR1.8V±0.1V

2.27x27mm1mmpitchPb-freeBGAPackage

3.Absolutemaximumpowerdissipation1.9W,typical1W

4.Operatingtemperature-40°Cto85°Cwithoutforcedaircooling

8、数据结构

8.1结构框图

8.2任务消息

信源、包处理任务通信包含硬件接口间的握手和固件之间握手

•硬件外围固件任务

•内部固件任务

•内存管理状态机

8.3GPONMAC

lGPONMAC使得以太网包和TDM承载在PON接口，用GEM的封装模式

l它支持ITU-TG.984.x标准的扩展接口功能

lGPONMAC是在PON和包处理器间响应GEMSAR功能，其也支持PON连接间上下T-CONT队列状态机的QoS功能

8.3.1RX

•Supportsratesof1.244Gbpsand2.488Gbps

•125µsframesynchronizationbasedonphysicalsynchronizationfieldandontheidentfield

•De-ScramblingaccordingtoG.984.3definitionusinganX7+X6+1polynomial

•BIPsupportinordertomeasurethelinkBER

•SupportsPLOAMhandling:

includingONU-IDfiltering,receivingofbroadcastPLOAMs,andCRCcheck

•SupportsPlenddatalengthextractionandcheck;includingCRC

•Supportspayloadfilteringaccordingtoa32PORT-IDmappingtable.DiscardspayloadsthatdonotbelongtotheONUandIDLEGEMfragments.

•SupportsFECdecoderRS（239,255）

•SupportsAESdecryption（countermodeonlywith128bytesofKey）ofGEMpayload.ConfiguredencryptionoptionisperONU.

•SupportsGEMheaderremovalanddataextraction（GEMSAR）

•Supportsinterleavingof32RXflowsof32PORT-IDs

•SupportsoneTDMRXflowofupto20MbpsontheTDMInterface

•Supportsthreediscardthresholds:

low,high,andveryhigh（data,PLOAM,andOMCI）

•SupportspacketCRC

•PassesrelevantUSBWmapinformationtotheTXunit

•ConfigurableEnable/Disable

•IncludesPMcounterblock

•IncludesInterruptblock

8.3.2TX

•Supportsratesof0.622Gbpsor1.244Gbps

•EightT-CONTS

•SupportsoneTDMTXflowat20MbpsfromtheTDMinterfacetooneoftheeightpayloadT-CONTS

•AdditionalT-CONTfornormalPLOAMS

•RXunitsynchronization

•UpstreamframegenerationbasedonUSBWaccesses（Overheads+payload）

•PLOuandPLSuoverheadgenerationbasedonconfiguredparameters

•ScramblingaccordingtoG.984.3definitionusinganX7+X6+1polynomial

•BIPgenerationtomeasurethelinkBER

•Static,urgent,andrangingPLOAMgeneratedbytheMIPS

•SupportsGEMheaderinsertionanddatasegmentation（GEMSAR）

•SupportspacketCRCcalculation

•SupportsIdleGEMframetransmission

•SchedulertocontrolframegenerationandtransmissionbasedonUSBWrecords.

•SupportsFECencoderRS（239,255）

•ConfigurableEnable/Disable

•AutomaticdisablewhenRXisdisabled

8.3.3下行流

GPON下行流，入口GEM帧是指定到具体包放置在适当的RX队列中。

基于它们的port-id，这些包被放置在各自握手任务的以态桥队列或者CPU队列。

在桥队列中先是在扩展前区分，然后分包送入出口队列。

8.3.4上行流

上行以太网包基于优先级被放置在不同的发送队列中，如基于cos，tos或者桥接等，每一个发送队列备连接到一个单播流Tcont。

每一个Tcont能维护一个优先级表。

每一个Tcont都被指定一个唯一id，以太网包通过多port-id能够合并为独立的id。

8.3.5信源/包处理流程

TheCell/PacketProcessorhandlerinterfaceswiththeGPONTXandGPONRX

peripheralsandtheBroadBus.

BroadBusphysicalformatadapter

TXSMsupports:

oRoundrobinfillingTXqueues

oThetransportlayeroftheBraodBustoenablecontrolanddataforwardingfortheTXqueues

RXSMsupports:

oPushdatafromGPONMACRXFIFOtotheCell/PacketProcessorSRAM

oManagetheRXFIFOintheSRAMbyBroadBusmessages:

􀂃TransmitMessages:

RXbufferdescriptor,Cell/PacketProcessorwakeup,andRXpayload

􀂃ReceiveMessage:

ACKindicatingRXbufferisreadbytheprocessorandthebufferisempty

8.3.6GEMPortInterface（TDM）

TheGEMinterfaceincludesaTXclock,TXdata,aRXclock,andRXdata.TheTXclockisgeneratedbytheBL2000andis19.44MHz,whichisderiveddirectlyfromthePONclock.TheRXclockisgeneratedbyanexternalcomponent,thecompanionTDMFPGA,andisupto19.44MHz.

8.3.7GPONActivationFlow

8.4BPONMAC

8.4.1TheBL2000BPONMACfeaturesinclude:

•BPONcompliancestandards

oG.983.1

􀂃TCLayerframingandde-churning

􀂃ITUI.432.1scrambling

􀂃Ranging

􀂃PhysicalLayerOAM（PLOAM）

􀂃FullOAMfaultsandalarm

oG.983.2（OMCI）

oG.983.4（DBA）

􀂃SR-DBAforenhancedQoScontrolandpeakbandwidthallocation

􀂃Internalorexternalqueuestatusreportingonmini-slots

•Supporteddatarates:

oDownstream:

1.244Gbpsor622Mbps

oUpstream:

155Mbps

•FourlevelQoSsupportforupstreamtraffic

•Queuemanager

oEightTrafficContainers（T-Conts）

oFlexibleassignmentofqueuesforupstream,downstreamorCPU

oFlexibleassignmentofqueuesizeandwatermark

•Supportfor32VP/VCgroupfilters

oSFU/SBEapplicationisassumed

o32-bitheadermask

oPromiscuousmode

•Supportforupto32activeAAL5flows

•SupportforallfivetypesofT-CONTs:

types1,2,3,4and5

•ATMcellprocessingwithend-to-endOAMperI.610

•Derivesclockfromrecoverednetworkclock

•Enables8KHzclockgenerationfromPLOAMSYNCbytes

•DedicatedconnectionsforIn-bandmanagementcanbedirectedtoCPU（ATM

OAMorOMCI）

8.4.2DownstreamFlow

8.4.3ReceivedPLOAMCellStructure

8.4.4UpstreamFlow

8.4.5UpstreamCellHandler

8.4.6Loopbacks

8.5以太网MAC

ForsubscriberEthernettraffic,twoMediaAccessControl（MAC）modulesareavailable.TheseallowtheBL2000tofunctionineitherdualFastEthernetmodeorsingleGigabitEthernetmode.IndualFastEthernetmode,thephysicaldevic