中英文翻译文档格式.docx

中英文翻译文档格式.docx

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sThumb®

-compatibleThumb-2instructionsettoreducememoryrequirementsand,thereby,cost.Finally,theLM3S811microcontrolleriscode-compatibletoallmembersoftheextensiveStellarisfamily;

providingflexibilitytofitourcustomers'

preciseneeds.

TexasInstrumentsoffersacompletesolutiontogettomarketquickly,withevaluationanddevelopmentboards,whitepapersandapplicationnotes,aneasy-to-useperipheraldriverlibrary,andastrongsupport,sales,anddistributornetwork.

FunctionalOverview

ThefollowingsectionsprovideanoverviewofthefeaturesoftheLM3S811microcontroller.

ARMCortex™-M3

ProcessorCore

AllmembersoftheStellarisproductfamily,includingtheLM3S811microcontroller,aredesignedaroundanARMCortex™-M3processorcore.TheARMCortex-M3processorprovidesthecoreforahigh-performance,low-costplatformthatmeetstheneedsofminimalmemoryimplementation,reducedpincount,andlow-powerconsumption,whiledeliveringoutstandingcomputationalperformanceandexceptionalsystemresponsetointerrupts.

SystemTimer（SysTick）

Cortex-M3includesanintegratedsystemtimer,SysTick.SysTickprovidesasimple,24-bitclear-on-write,decrementing,wrap-on-zerocounterwithaflexiblecontrolmechanism.Thecountercanbeusedinseveraldifferentways,forexample:

■AnRTOSticktimerwhichfiresataprogrammablerate（forexample,100Hz）andinvokesaSysTickroutine.

■Ahigh-speedalarmtimerusingthesystemclock.

■Avariableratealarmorsignaltimer—thedurationisrange-dependentonthereferenceclockusedandthedynamicrangeofthecounter.

■Asimplecounter.Softwarecanusethistomeasuretimetocompletionandtimeused.

■Aninternalclocksourcecontrolbasedonmissing/meetingdurations.TheCOUNTFLAGbit-fieldinthecontrolandstatusregistercanbeusedtodetermineifanactioncompletedwithinasetduration,aspartofadynamicclockmanagementcontrolloop.

NestedVectoredInterruptController（NVIC）

TheLM3S811controllerincludestheARMNestedVectoredInterruptController（NVIC）ontheARM®

Cortex™-M3core.TheNVICandCortex-M3prioritizeandhandleallexceptions.AllexceptionsarehandledinHandlerMode.Theprocessorstateisautomaticallystoredtothestackonanexception,andautomaticallyrestoredfromthestackattheendoftheInterruptServiceRoutine（ISR）.Thevectorisfetchedinparalleltothestatesaving,whichenablesefficientinterruptentry.

Theprocessorsupportstail-chaining,whichenablesback-to-backinterruptstobeperformedwithouttheoverheadofstatesavingandrestoration.Softwarecanseteightprioritylevelson7exceptions（systemhandlers）and26interrupts.

SystemControlBlock（SCB）

TheSCBprovidessystemimplementationinformationandsystemcontrol,includingconfiguration,control,andreportingofsystemexceptions.

MemoryProtectionUnit（MPU）

TheMPUsupportsthestandardARMv7ProtectedMemorySystemArchitecture（PMSA）model.

TheMPUprovidesfullsupportforprotectionregions,overlappingprotectionregions,accesspermissions,andexportingmemoryattributestothesystem.

MotorControlPeripherals

Toenhancemotorcontrol,theLM3S811controllerfeaturesPulseWidthModulation（PWM）outputs.

PWM

Pulsewidthmodulation（PWM）isapowerfultechniquefordigitallyencodinganalogsignallevels.

High-resolutioncountersareusedtogenerateasquarewave,andthedutycycleofthesquarewaveismodulatedtoencodeananalogsignal.Typicalapplicationsincludeswitchingpowersuppliesandmotorcontrol.

OntheLM3S811,PWMmotioncontrolfunctionalitycanbeachievedthrough:

■Dedicated,flexiblemotioncontrolhardwareusingthePWMpins

■Themotioncontrolfeaturesofthegeneral-purposetimersusingtheCCPpins

PWMPins

TheLM3S811PWMmoduleconsistsofthreePWMgeneratorblocksandacontrolblock.EachPWMgeneratorblockcontainsonetimer（16-bitdownorup/downcounter）,twocomparators,aPWMsignalgenerator,adead-bandgenerator,andaninterrupt/ADC-triggerselector.ThecontrolblockdeterminesthepolarityofthePWMsignals,andwhichsignalsarepassedthroughtothepins.

EachPWMgeneratorblockproducestwoPWMsignalsthatcaneitherbeindependentsignalsorasinglepairofcomplementarysignalswithdead-banddelaysinserted.TheoutputofthePWMgenerationblocksaremanagedbytheoutputcontrolblockbeforebeingpassedtothedevicepins.

CCPPins

TheGeneral-PurposeTimerModule'

sCCP（CaptureComparePWM）pinsaresoftwareprogrammabletosupportasimplePWMmodewithasoftware-programmableoutputinversionofthePWMsignal.

FaultPin

TheLM3S811PWMmoduleincludesonefault-conditionhandlinginputtoquicklyprovidelow-latencyshutdownandpreventdamagetothemotorbeingcontrolled.

AnalogPeripherals

Tohandleanalogsignals,theLM3S811microcontrolleroffersanAnalog-to-DigitalConverter（ADC）.

Forsupportofanalogsignals,theLM3S811microcontrolleroffersoneanalogcomparator.

ADC

Ananalog-to-digitalconverter（ADC）isaperipheralthatconvertsacontinuousanalogvoltagetoadiscretedigitalnumber.

TheLM3S811ADCmodulefeatures10-bitconversionresolutionandsupportsfourinputchannels,plusaninternaltemperaturesensor.Fourbufferedsamplesequencesallowrapidsamplingofuptoeightanaloginputsourceswithoutcontrollerintervention.Eachsamplesequenceprovidesflexibleprogrammingwithfullyconfigurableinputsource,triggerevents,interruptgeneration,andsequencepriority.

AnalogComparators

Ananalogcomparatorisaperipheralthatcomparestwoanalogvoltages,andprovidesalogicaloutputthatsignalsthecomparisonresult.

TheLM3S811microcontrollerprovidesoneanalogcomparatorthatcanbeconfiguredtodriveanoutputorgenerateaninterruptorADCevent.

Acomparatorcancompareatestvoltageagainstanyoneofthesevoltages:

■Anindividualexternalreferencevoltage

■Asharedsingleexternalreferencevoltage

■Asharedinternalreferencevoltage

Thecomparatorcanprovideitsoutputtoadevicepin,actingasareplacementforananalogcomparatorontheboard,oritcanbeusedtosignaltheapplicationviainterruptsortriggerstotheADCtocauseittostartcapturingasamplesequence.TheinterruptgenerationandADCtriggeringlogicisseparate.Thismeans,forexample,thataninterruptcanbegeneratedonarisingedgeandtheADCtriggeredonafallingedge

SerialCommunicationsPeripherals

TheLM3S811controllersupportsbothasynchronousandsynchronousserialcommunicationswith:

■Twofullyprogrammable16C550-typeUARTs

■OneSSImodule

■OneI2Cmodule

UART

AUniversalAsynchronousReceiver/Transmitter（UART）isanintegratedcircuitusedforRS-232Cserialcommunications,containingatransmitter（parallel-to-serialconverter）andareceiver（serial-to-parallelconverter）,eachclockedseparately.

TheLM3S811controllerincludestwofullyprogrammable16C550-typeUARTsthatsupportdatatransferspeedsupto3.125Mbps.（Althoughsimilarinfunctionalitytoa16C550UART,itisnotregister-compatible.）

Separate16x8transmit（TX）andreceive（RX）FIFOsreduceCPUinterruptserviceloading.TheUARTcangenerateindividuallymaskedinterruptsfromtheRX,TX,modemstatus,anderrorconditions.Themoduleprovidesasinglecombinedinterruptwhenanyoftheinterruptsareassertedandareunmasked.

SSI

SynchronousSerialInterface（SSI）isafour-wirebi-directionalfullandlow-speedcommunicationsinterface.

TheLM3S811controllerincludesoneSSImodulethatprovidesthefunctionalityforsynchronousserialcommunicationswithperipheraldevices,andcanbeconfiguredtousetheFreescaleSPI,MICROWIRE,orTIsynchronousserialinterfaceframeformats.Thesizeofthedataframeisalsoconfigurable,andcanbesetbetween4and16bits,inclusive.

TheSSImoduleperformsserial-to-parallelconversionondatareceivedfromaperipheraldevice,andparallel-to-serialconversionondatatransmittedtoaperipheraldevice.TheTXandRXpathsarebufferedwithinternalFIFOs,allowinguptoeight16-bitvaluestobestoredindependently.

TheSSImodulecanbeconfiguredaseitheramasterorslavedevice.Asaslavedevice,theSSImodulecanalsobeconfiguredtodisableitsoutput,whichallowsamasterdevicetobecoupledwithmultipleslavedevices.

TheSSImodulealsoincludesaprogrammablebitrateclockdividerandprescalertogeneratetheoutputserialclockderivedfromtheSSImodule'

sinputclock.Bitratesaregeneratedbasedontheinputclockandthemaximumbitrateisdeterminedbytheconnectedperipheral.

I2C

TheInter-IntegratedCircuit（I2C）busprovidesbi-directionaldatatransferthroughatwo-wiredesign（aserialdatalineSDAandaserialclocklineSCL）.

TheI2CbusinterfacestoexternalI2Cdevicessuchasserialmemory（RAMsandROMs）,networkingdevices,LCDs,tonegenerators,andsoon.TheI2Cbusmayalsobeusedforsystemtestinganddiagnostic