单片机外文翻译51系列单片机的功能和结构译文英文Word下载.docx

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单片机外文翻译51系列单片机的功能和结构译文英文Word下载.docx

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单片机外文翻译51系列单片机的功能和结构译文英文Word下载.docx

StructureandfunctionoftheMCS-51seriesone-chipcomputerisanameofapieceofone-chipcomputerserieswhichIntelCompanyproduces.Thiscompanyintroduced8top-gradeone-chipcomputersofMCS-51seriesin1980afterintroducing8one-chipcomputersofMCS-48seriesin1976.Itbelongtoalotofkindsthislineofone-chipcomputerthechipshave,suchas8051,8031,8751,80C51BH,

80C31BH,etc.,theirbasiccomposition,basicperformanceandinstructionsystemareallthesame.8051dailyrepresentatives-51serialone-chipcomputers.

Anone-chipcomputersystemismadeupofseveralfollowingparts:

(1)Onemicroprocessorof8(CPU).

(2)AtslicedatamemoryRAM(128B/256B),itusenotdeposittingnotcanreading/datathatwrite,suchasresultnotmiddleofoperation,finalresultanddatawantedtoshow,etc.(3)ProcedurememoryROM/EPROM(4KB/8KB),isusedtopreservetheprocedure,someinitialdataandforminslice.ButdoesnottakeROM/EPROMwithinsomeone-chipcomputers,suchas8031,8032,80C,etc..(4)Four8runsidebysideI/OinterfaceP0fourP3,eachmouthcanuseasintroduction,mayuseasexportingtoo.(5)Twotimer/counter,eachtimer/countermaysetupandcountintheway,usedtocounttotheexternalincident,cansetupintoatimingwaytoo,andcanaccordingtocountorresultoftimingrealizethecontrolofthecomputer.(6)Fivecutoffcuttingoffthecontrolsystemofthesource.(7)OneallduplexingserialI/OmouthofUART(universalasynchronous

receiver/transmitter(UART)),isitrealizeone-chipcomputerorone-chipcomputerandserialcommunicationofcomputertousefor.(8)Stretchoscillatorandclockproducecircuit,quartzcrystalfinelytuneelectriccapacityneedouter.Allowoscillationfrequencyas12megahertasnowatmost.Everytheabove-mentionedpartwasjoinedthroughtheinsidedatabus.Amongthem,CPUisacoreoftheone-chipcomputer,itisthecontrolofthecomputerandcommandcentre,madeupofsuchpartsasarithmeticunitandcontroller,etc..Thearithmeticunitcancarryon8personsofarithmeticoperationandunitALUoflogicoperationwhileincludingone,the1storingdevicetemporariliesof8,storingdevice2

temporarily,8'

saccumulationdeviceACC,registerBandprocedurestateregisterPSW,etc.PersonwhoaccumulateACCcountby2inputendsenteredofcheckingetc.temporarilyasoneoperationoften,comefrompersonwhostore1operationisitisitmakeoperationtogoontocounttemporarily,operationresultandloopbackACCwithanotherone.Inaddition,ACCisoftenregardedasthetransferstationofdatatransmissionon8051inside.Thesameasgeneralmicroprocessor,itisthebusiestregister.HelprememberingthatagreeingwithAexpressesintheorder.Thecontrollerincludestheprocedurecounter,theorderisdepositted,theorderdecipher,theoscillatorandtimingcircuit,etc.Theprocedurecounterismadeupofcounterof8fortwo,amountsto16.Itisabyteaddresscounteroftheprocedureinfact,thecontentisthenextIAthatwillcarriedoutinPC.Thecontentwhichchangesitcanchangethedirectionthattheprocedurecarriesout.Shakethecircuitin8051one-chipcomputers,onlyneedouterquartzcrystalandfrequencytofinelytunetheelectriccapacity,itsfrequencyrangeisits12MHZof1.2MHZ.Thispulsesignal,as8051basicbeatsofworking,namelytheminimumunitoftime.8051isthesameasothercomputers,theworkinharmonyunderthecontrolofthebasicbeat,justlikeanorchestraaccordingtothebeatplaythatiscommanded.

ThereareROM(procedurememory,canonlyread)andRAMin8051slices(datamemory,canisitcanwrite)twotoread,theyhaveeachindependentmemoryaddressspace,disposewaytobethesamewithgeneralmemoryofcomputer.Procedure8051memoryand8751sliceprocedurememorycapacity4KB,addressbeginfrom0000H,usedforpreservingtheprocedureandformconstant.Data8051-87518031ofmemorydatamemory128B,addressfalse00FH,useformiddleresulttodepositoperation,thedataarestoredtemporarilyandthedataarebufferedetc..InRAMofthis128B,thereisunitof32bytesesthatcanbeappointedasthejobregister,thisandgeneralmicroprocessorisdifferent,8051sliceRAMandjobregisterrankoneformationthesametoarrangethelocation.ItisnotverythesamethatthememoryofMCS-51seriesone-chipcomputerandgeneralcomputerdisposesthewayinaddition.Generalcomputerforfirstaddressspace,ROMandRAMcanarrangein

differentspacewithintherangeofthisaddressatwill,namelytheaddressesofROMandRAM,withdistributingdifferentaddressspaceinaformation.Whilevisitingthememory,correspondingandonlyanaddressMemoryunit,canROM,itcanbeRAMtoo,andbyvisitingtheordersimilarly.ThiskindofmemorystructureiscalledthestructureofPrinceton.8051memoriesaredividedintoprocedurememoryspaceanddatamemoryspaceonthephysicsstructure,therearefourmemoryspacesinall:

Theprocedurestoresinoneanddatamemoryspaceoutsidedatamemoryandoneinprocedurememoryspaceandoneoutsideone,thestructureformsofthiskindofproceduredeviceanddatamemoryseparatedformdatamemory,calledHarvardstructure.Butusetheanglefromusers,8051memoryaddressspaceisdividedintothreekinds:

(1)Intheslice,arrangeblocksofFFFFH,0000Hoflocation,inunisonoutsidetheslice(use16addresses).

(2)Thedatamemoryaddressspaceoutsideoneof64KB,theaddressisarrangedfrom0000H64KBFFFFH(with16addresses)tootothelocation.(3)Datamemoryaddressspaceof256B(use8addresses).Threeabove-mentionedmemoryspaceaddressesoverlap,fordistinguishinganddesigningtheordersymbolofdifferentdatatransmissionintheinstructionsystemof8051:

CPUvisitslice,ROMorderspendMOVC,visitblockRAMorderusesMOVXoutsidetheslice,RAMorderusesMOVtovisitinslice.

8051one-chipcomputerhavefour8walkabreastI/Oport,callP0,P1,P2andP3.Eachportis8accuratetwo-waymouths,accountsfor32pinsaltogether.EveryoneI/Olinecanbeusedasintroductionandexportedindependently.Eachportincludesalatch(namelyspecialfunctionregister),oneexportsthedriverandaintroductionbuffer.Makedatacanlatchwhenoutputting,datacanbufferwhenmakingintroduction,butfourfunctionofpasswaytheseself-same.Expandamongthesystemofmemoryoutsidehavingslice,fourportthesemayserveasaccuratetwo-waymouthofI/Oincommonuse.Expandamongthesystemofmemoryoutsidehavingslice,P2mouthseehigh8addressoff;

P0mouthisatwo-waybus,sendtheintroductionof8lowaddressesanddata/exportintimesharing

Thecircuitof8051one-chipcomputersandfourI/Oportsisvery

ingeniousindesign.FamiliarwithI/Oportlogicalcircuit,notonlyhelptouseportscorrectlyandrationally,andwillinspiretodesigningtheperipherallogicalcircuitofone-chipcomputertosomeextent.Loadabilityandinterfaceofporthavecertainrequirement,becauseoutputgrade,P0ofmouthandP1endoutput,P3ofmouthgradedifferentatstructure,so,theloadabilityandinterfaceofitsdoordemandtohavenothingincommonwitheachother.P0mouthisdifferentfromothermouths,itsoutputgradedrawstheresistancesupremly.Whenusingitasthemouthincommonusetouse,outputgradeisitleakcircuittoturnon,isitisiturgeNMOSdrawtheresistanceontakingtobeouterwithitwhileinputtingtogoouttofail.Whenbeingusedasintroduction,shouldwrite"

1"

toalatchfirst.EveryonewithP0mouthcandrive8ModelLSTTLloadtoexport.P1mouthisanaccuratetwo-waymouthtoo,usedasI/Oincommonuse.DifferentfromP0mouthoutputofcircuitits,drawloadresistancelinkwithpoweroninsidehave.Infact,theresistanceisthattwoeffectsareinchargeofFETandtogether:

OneFETisinchargeofload,itsresistanceisregular.Anotheronecanisitleadtoworkwithcloseattwostate,makeitsPresidentresistancevaluechangeapproximate0orgroupvalueheavytwosituationvery.Whenitis0thattheresistanceisapproximate,candrawthepintothehighlevelfast;

Whenresistancevalueisverylarge,P1mouth,inordertohindertheintroductionstatehigh.OutputasP1mouthhighelectricityatordinarytimes,canisitdrawelectriccurrentloadtoofferoutwards,drawtheresistanceonneedn'

tanswerandthenning.Herewhentheportisusedasintroduction,mustwriteinto1tothecorrespondinglatchfirsttoo,makeFETend.Relativelyabout20,000ohmsbecauseoftheloadresistanceinsceneandbecause40,000ohms,willnotexertaninfluenceonthedatathatareinput.ThestructureofP2somemouthissimilartoP0mouth,thereareMUXswitches.Isitsimilartomouthpartlytourge,butmouthlargeaconversioncontrolssomethanP1.P3mouthonemulti-functionalport,mouthgettingmanythanP1ithave"

and"

3doorand4buffer"

.Twopartthese,makeherbesidesaccuratetwo-wayfunctionwithP1mouthjust,canalsousethesecondfunctionofeverypin,"

door3functiononeswitchinfact,itdeterminestobeto

outputdataoflatchtooutputsecondsignaloffunction.ActasW=At1o'

clock,outputQendsignal;

ActasQ=At1o'

clock,canoutputWlinesignal.Atthetimeofprogramming,itisthatthefirstfunctionisstillthesecondfunctionbutneedn'

thavesoftwarethatsetupP3mouthinadvance.IthardwarenotinsideistheautomatictohavetwofunctionoutputtedwhenCPUcarriesonSFRandseeksthelocation(thelocationorthebyte)tovisittoP3mouth/atnotlastinglining,thereareinsidehardwarelatch

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