通信工程中英文对照外文翻译文献Word文件下载.docx

通信工程中英文对照外文翻译文献Word文件下载.docx

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（2）AtslicedatamemoryRAM（128B/256B）,itusedtodepositingnotcanreading/datathatwrite,suchasresultnotmiddleofoperation,finalresultanddatawantedtoshow,etc.

（3）ProcedurememoryROM/EPROM（4KB/8KB）,isusedtopreservetheprocedure,someinitialdataandforminslice.ButdoesnottakeROM/EPROMwithinsomeone-chipcomputers,suchas8031,8032,80C,etc..

（4）Four8runsidebysideI/OinterfaceP0fourP3,eachmouthcanuseasintroduction,mayuseasexportingtoo.

（5）Twotimer/counter,eachtimer/countermaysetupandcountintheway,usedtocounttotheexternalincident,cansetupintoatimingwaytoo,andcanaccordingtocountorresultoftimingrealizetheontrolofthecomputer.

（6）Fivecutoffcuttingoffthecontrolsystemofthesource.

（7）OneallduplexserialI/OmouthofUART（universalasynchronousreceiver/transmitter（UART））,isitrealizeone-chipcomputerorone-chipcomputer

andserialcommunicationofcomputertousefor.

（8）Stretchoscillatorandclockproducecircuit,quartzcrystalfinelytuneelectriccapacityneedouter.

Allowoscillationfrequencyas12nowatmost.Everytheabove-mentionedpartwasjoinedthroughtheinsidedatabus.

Amongthem,CPUisacoreoftheone-chipcomputer,itisthecontrolofthe

computerandcommandcentre,madeupofsuchpartsasarithmeticunitandcontroller,etc..Thearithmeticunitcancarryon8personsofarithmeticoperationandunitALUoflogicoperationwhileincludingone,the1storingdevicetemporarilyof8,storingdevice2temporarily,8'

saccumulationdeviceACC,registerBandprocedurestateregisterPSW,etc.PersonwhoaccumulateACCcountby2inputendsenteredof

checkingetc.temporarilyasoneoperationoften,comefrompersonwhostore1

operationisitisitmakeoperationtogoontocounttemporarily,operationresultand

loopbackACCwithanotherone.Inaddition,ACCisoftenregardedasthetransferstationofdatatransmissionon8051inside.Thesameasgeneralmicroprocessor,itisthebusiestregister.HelprememberingthatagreeingwithAexpressesintheorder.Thecontrollerincludestheprocedurecounter,theorderisdeposited,theorderdecipher,theoscillatorandtimingcircuit,etc.Theprocedurecounterismadeupofcounterof8fortwo,amountsto16.Itisabyteaddresscounteroftheprocedureinfact,thecontentisthenextIAthatwillcarriedoutinPC.Thecontentwhichchangesitcanchangethedirectionthattheprocedurecarriesout.Shakethecircuitin8051one-chipcomputers,onlyneedouterquartzcrystalandfrequencytofinelytunetheelectriccapacity,itsfrequencyrangeisits12MHZof1.2MHZ.Thispulsesignal,as8051basicbeatsofworking,namelytheminimumunitoftime.8051isthesameasothercomputers,theworkinharmonyunderthecontrolofthebasicbeat,justlikeanorchestraaccordingtothebeatplaythatiscommanded.

ThereareROM（procedurememory,canonlyread）andRAMin8051slices（datamemory,canisitcanwrite）twotoread,theyhaveeachindependentmemoryaddressspace,disposewaytobethesamewithgeneralmemoryofcomputer.Procedure8051memoryand8751sliceprocedurememorycapacity4KB,address

beginfrom0000H,usedforpreservingtheprocedureandformconstant.Data8051-

87518031ofmemorydatamemory128B,addressfalse00FH,useformiddleresult

todepositoperation,thedataarestoredtemporarilyandthedataarebufferedetc..In

RAMofthis128B,thereisunitof32bytesthatcanbeappointedasthejobregister,

thisandgeneralmicroprocessorisdifferent,8051sliceRAMandjobregisterrank

oneformationthesametoarrangethelocation.Itisnotverythesamethatthe

memoryofMCS-51seriesone-chipcomputerandgeneralcomputerdisposestheway

inaddition.Generalcomputerforfirstaddressspace,ROMandRAMcanarrangein

differentspacewithintherangeofthisaddressatwill,namelytheaddressesofROM

andRAM,withdistributingdifferentaddressspaceinaformation.Whilevisitingthe

memory,correspondingandonlyanaddressMemoryunit,canROM,itcanbeRAM

too,andbyvisitingtheordersimilarly.Thiskindofmemorystructureiscalledthe

structureofPrinceton.8051memoriesaredividedintoprocedurememoryspaceand

datamemoryspaceonthephysicsstructure,therearefourmemoryspacesinall:

The

procedurestoresinoneanddatamemoryspaceoutsidedatamemoryandonein

procedurememoryspaceandoneoutsideone,thestructureformsofthiskindof

proceduredeviceanddatamemoryseparatedformdatamemory,calledHarvard

structure.Butusetheanglefromusers,8051memoryaddressspaceisdividedinto

threekinds:

（1）Intheslice,arrangeblocksofFFFFH,0000Hoflocation,inunison

outsidetheslice（use16addresses）.

（2）Thedatamemoryaddressspaceoutsideoneof64KB,theaddressisarrangedfrom0000H64KBFFFFH（with16addresses）tootothelocation.（3）Datamemoryaddressspaceof256B（use8addresses）.Three

above-mentionedmemoryspaceaddressesoverlap,fordistinguishinganddesigning

theordersymbolofdifferentdatatransmissionintheinstructionsystemof8051:

CPUvisitslice,ROMorderspendMOVC,visitblockRAMorderusesMOVXoutsidetheslice,RAMorderusesMOVtovisitinslice.8051one-chipcomputerhavefour8walkabreastI/Oport,callP0,P1,P2andP3.Eachportis8accuratetwo-waymouths,accountsfor32pinsaltogether.EveryoneI/Olinecanbeusedasintroductionandexportedindependently.Eachportincludesalatch（namelyspecialfunctionregister）,oneexportsthedriverandaintroductionbuffer.Makedatacanlatchwhenoutputting,datacanbufferwhenmakingintroduction,butfourfunctionofpasswaytheseself-same.Expandamongthesystemofmemoryoutsidehavingslice,fourportthesemayserveasaccuratetwo-waymouthofI/Oincommonuse.Expandamongthesystemofmemoryoutsidehavingslice,P2mouthseehigh8addressoff;

P0mouthisatwo-waybus,sendtheintroductionof8lowaddressesanddata/exportintimesharingThecircuitof8051one-chipcomputersandfourI/Oportsisveryingeniousindesign.FamiliarwithI/Oportlogicalcircuit,notonlyhelptouseportscorrectlyandrationally,andwillinspiretodesigningtheperipherallogicalcircuitofone-chipcomputertosomeextent.Loadabilityandinterfaceofporthavecertainrequirement,becauseoutputgrade,P0ofmouthandP1endoutput,P3ofmouthgradedifferentatstructure,so,theloadabilityandinterfaceofitsdoordemandtohavenothingincommonwitheachother.P0mouthisdifferentfromothermouths,itsoutputgradedrawstheresistancesupreme.Whenusingitasthemouthincommonusetouse,outputgradeisitleakcircuittoturnon,isitisiturgeNMOSdrawtheresistanceontakingtobeouterwithitwhileinputtingtogoouttofail.Whenbeingusedasintroduction,shouldwrite"

1"

toalatchfirst.EveryonewithP0mouthcandrive8ModelLSTTLloadtoexport.P1mouthisanaccuratetwo-waymouthtoo,usedasI/Oincommonuse.DifferentfromP0mouthoutputofcircuitits,drawload

resistancelinkwithpoweroninsidehave.Infact,theresistanceisthattwoeffectsare

inchargeofFETandtogether:

OneFETisinchargeofload,itsresistanceisregular.

Anotheronecanisitleadtoworkwithcloseattwostate,makeitsPresident

resistancevaluechangeapproximate0orgroupvalueheavytwosituationvery.When

itis0thattheresistanceisapproximate,candrawthepintothehighlevelfast

4/6

Whenresistancevalueisverylarge,P1mouth,inordertohindertheintroduction

statehigh.OutputasP1mouthhighelectricityatordinarytimes,canisitdraw

electriccurrentloadtoofferoutwards,drawtheresistanceonneedn'

tanswerandthen.

Herewhentheportisusedasintroduction,mustwriteinto1tothecorresponding

latchfirsttoo,makeFETend.ThestructureofP2somemouthissimilartoP0mouth,

thereareMUXswitches.Isitsimilartomouthpartlytourge,butmouthlargea

conversioncontrolssomethanP1.P3mouthonemulti-functionalport,mouthgetting

manythanP1ithave"

and"

3doorand4buffer"

.Twopartthese,makeherbesides

accuratetwo-wayfunctionwithP1mouthjust,canalsousethesecondfunctionof

everypin,"

door3functiononeswitchinfact,itdeterminestobetooutputdata

oflatchtooutputsecondsignaloffunction.ActasW=At1o'

clock,outputQend

signal;

ActasQ=At1o'

clock,canoutputWlinesignal.Atthetimeofprogramming,itisthatthefirstfunctionisstillthesecondfunctionbutneedn'

thavesoftwarethatset

upP3mouthinadvance.Ithardwarenotinsideistheautomatictohavetwofunction

outputtedwhenCPUcarriesonSFRandseeksthelocation（thelocationorthebyte）

tovisittoP3mouth/atnotlastinglining,thereareinsidehardwarelatchQs=1.The

operationprincipleofP3mouthissimilartoP1mouth.

Outputgrade,P3ofmouth,P1o