基于FPGA的SDRAM实验Verilog源代码.docx

1、基于FPGA的SDRAM实验Verilog源代码/ megafunction wizard: %ALTPLL%/ GENERATION: STANDARD/ VERSION: WM1.0/ MODULE: altpll / =/ File Name: clk_ctrl.v/ Megafunction Name(s):/ altpll/ Simulation Library Files(s):/ altera_mf/ =/ */ THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!/ 11.0 Build 208 07/03/2011 S

2、P 1 SJ Full Version/ */Copyright (C) 1991-2011 Altera Corporation/Your use of Altera Corporations design tools, logic functions /and other software and tools, and its AMPP partner logic /functions, and any output files from any of the foregoing /(including device programming or simulation files), an

3、d any /associated documentation or information are expressly subject /to the terms and conditions of the Altera Program License /Subscription Agreement, Altera MegaCore Function License /Agreement, or other applicable license agreement, including, /without limitation, that your use is for the sole p

4、urpose of /programming logic devices manufactured by Altera and sold by /Altera or its authorized distributors. Please refer to the /applicable agreement for further details./ synopsys translate_offtimescale 1 ps / 1 ps/ synopsys translate_onmodule clk_ctrl ( areset, inclk0, c0, c1, c2, locked); inp

5、ut areset; input inclk0; output c0; output c1; output c2; output locked;ifndef ALTERA_RESERVED_QIS/ synopsys translate_offendif tri0 areset;ifndef ALTERA_RESERVED_QIS/ synopsys translate_onendif wire 5:0 sub_wire0; wire sub_wire2; wire 0:0 sub_wire7 = 1h0; wire 2:2 sub_wire4 = sub_wire02:2; wire 0:0

6、 sub_wire3 = sub_wire00:0; wire 1:1 sub_wire1 = sub_wire01:1; wire c1 = sub_wire1; wire locked = sub_wire2; wire c0 = sub_wire3; wire c2 = sub_wire4; wire sub_wire5 = inclk0; wire 1:0 sub_wire6 = sub_wire7, sub_wire5; altpll altpll_component ( .areset (areset), .inclk (sub_wire6), .clk (sub_wire0),

7、.locked (sub_wire2), .activeclock (), .clkbad (), .clkena (61b1), .clkloss (), .clkswitch (1b0), .configupdate (1b0), .enable0 (), .enable1 (), .extclk (), .extclkena (41b1), .fbin (1b1), .fbmimicbidir (), .fbout (), .fref (), .icdrclk (), .pfdena (1b1), .phasecounterselect (41b1), .phasedone (), .p

8、hasestep (1b1), .phaseupdown (1b1), .pllena (1b1), .scanaclr (1b0), .scanclk (1b0), .scanclkena (1b1), .scandata (1b0), .scandataout (), .scandone (), .scanread (1b0), .scanwrite (1b0), .sclkout0 (), .sclkout1 (), .vcooverrange (), .vcounderrange (); defparam altpll_component.clk0_divide_by = 1, alt

9、pll_component.clk0_duty_cycle = 50, altpll_component.clk0_multiply_by = 5, altpll_component.clk0_phase_shift = 0, altpll_component.clk1_divide_by = 1, altpll_component.clk1_duty_cycle = 50, altpll_component.clk1_multiply_by = 1, altpll_component.clk1_phase_shift = 0, altpll_component.clk2_divide_by

10、= 1, altpll_component.clk2_duty_cycle = 50, altpll_component.clk2_multiply_by = 5, altpll_component.clk2_phase_shift = 5000, altpll_pensate_clock = CLK0, altpll_component.gate_lock_signal = NO, altpll_component.inclk0_input_frequency = 50000, altpll_component.intended_device_family = Cyclone II, alt

11、pll_component.invalid_lock_multiplier = 5, altpll_component.lpm_hint = CBX_MODULE_PREFIX=clk_ctrl, altpll_component.lpm_type = altpll, altpll_component.operation_mode = NORMAL, altpll_component.port_activeclock = PORT_UNUSED, altpll_component.port_areset = PORT_USED, altpll_component.port_clkbad0 =

12、PORT_UNUSED, altpll_component.port_clkbad1 = PORT_UNUSED, altpll_component.port_clkloss = PORT_UNUSED, altpll_component.port_clkswitch = PORT_UNUSED, altpll_component.port_configupdate = PORT_UNUSED, altpll_component.port_fbin = PORT_UNUSED, altpll_component.port_inclk0 = PORT_USED, altpll_component

13、.port_inclk1 = PORT_UNUSED, altpll_component.port_locked = PORT_USED, altpll_component.port_pfdena = PORT_UNUSED, altpll_component.port_phasecounterselect = PORT_UNUSED, altpll_component.port_phasedone = PORT_UNUSED, altpll_component.port_phasestep = PORT_UNUSED, altpll_component.port_phaseupdown =

14、PORT_UNUSED, altpll_component.port_pllena = PORT_UNUSED, altpll_component.port_scanaclr = PORT_UNUSED, altpll_component.port_scanclk = PORT_UNUSED, altpll_component.port_scanclkena = PORT_UNUSED, altpll_component.port_scandata = PORT_UNUSED, altpll_component.port_scandataout = PORT_UNUSED, altpll_co

15、mponent.port_scandone = PORT_UNUSED, altpll_component.port_scanread = PORT_UNUSED, altpll_component.port_scanwrite = PORT_UNUSED, altpll_component.port_clk0 = PORT_USED, altpll_component.port_clk1 = PORT_USED, altpll_component.port_clk2 = PORT_USED, altpll_component.port_clk3 = PORT_UNUSED, altpll_c

16、omponent.port_clk4 = PORT_UNUSED, altpll_component.port_clk5 = PORT_UNUSED, altpll_component.port_clkena0 = PORT_UNUSED, altpll_component.port_clkena1 = PORT_UNUSED, altpll_component.port_clkena2 = PORT_UNUSED, altpll_component.port_clkena3 = PORT_UNUSED, altpll_component.port_clkena4 = PORT_UNUSED,

17、 altpll_component.port_clkena5 = PORT_UNUSED, altpll_component.port_extclk0 = PORT_UNUSED, altpll_component.port_extclk1 = PORT_UNUSED, altpll_component.port_extclk2 = PORT_UNUSED, altpll_component.port_extclk3 = PORT_UNUSED, altpll_component.valid_lock_multiplier = 1;endmodule/ =/ CNX file retrieva

18、l info/ =/ Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING 0/ Retrieval info: PRIVATE: BANDWIDTH STRING 1.000/ Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING 0/ Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING MHz/ Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING Low/ Retrieval info: P

19、RIVATE: BANDWIDTH_USE_AUTO STRING 1/ Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING 0/ Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING 0/ Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING 0/ Retrieval info: PRIVATE: CLKLOSS_CHECK STRING 0/ Retrieval info: PRIVATE: CLKSWITCH_CHECK ST

20、RING 1/ Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING 0/ Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING 0/ Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING 0/ Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING c0/ Retrieval info: PRIVATE: CUR_FBIN_CLK STRING c0/ Retrieval info: PRIV

21、ATE: DEVICE_SPEED_GRADE STRING 8/ Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC 1/ Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC 1/ Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC 1/ Retrieval info: PRIVATE: DUTY_CYCLE0 STRING 50.00000000/ Retrieval info: PRIVATE: DUTY_CYCLE1 STRING 50.00000000/ Retrieva

22、l info: PRIVATE: DUTY_CYCLE2 STRING 50.00000000/ Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING 100.000000/ Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING 20.000000/ Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING 100.000000/ Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTE

23、R STRING 0/ Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING 0/ Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING 1/ Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING 1/ Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING 0/ Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC 10485

24、75/ Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING 1/ Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING 20.000/ Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING MHz/ Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING 100.000/ Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING 1/ Retr

25、ieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING 1/ Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING MHz/ Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING Cyclone II/ Retrieval info: PRIVATE: INT_FEEDBACK_MODE_RADIO STRING 1/ Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING 1/ Ret

26、rieval info: PRIVATE: LONG_SCAN_RADIO STRING 1/ Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING Not Available/ Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC 0/ Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING deg/ Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING deg/ Ret

27、rieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING deg/ Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING Any/ Retrieval info: PRIVATE: MIRROR_CLK0 STRING 0/ Retrieval info: PRIVATE: MIRROR_CLK1 STRING 0/ Retrieval info: PRIVATE: MIRROR_CLK2 STRING 0/ Retrieval info: PRIVATE: MULT_FACTOR0 NUME

28、RIC 5/ Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC 1/ Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC 5/ Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING 1/ Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING 100.00000000/ Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING 100.00000000/ Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING 100.00000000/ Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING 0/ Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING 0/ Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING 0/ Retrieval i