Electronic Circuits with MATLAB, PSpice, and Smith Chart-Wiley (2.pdf

1、ElectronicCircuitswithMATLAB,PSpice,and Smith ChartElectronic Circuits with MATLAB,PSpice,and Smith ChartWon Y.Yang,Jaekwon Kim,Kyung W.Park,Donghyun Baek,Sungjoon Lim,Jingon Joung,Suhyun Park,Han L.Lee,Woo June Choi,and Taeho ImThis edition first published 2020 2020 John Wiley&Sons,Inc.All rights r

2、eserved.No part of this publication may be reproduced,stored in a retrieval system,ortransmitted,in any form or by any means,electronic,mechanical,photocopying,recording orotherwise,except as permitted by law.Advice on how to obtain permission to reuse material fromthis title is available at http:/

3、right of Won Y.Yang,Jaekwon Kim,Kyung W.Park,Donghyun Baek,Sungjoon Lim,JingonJoung,Suhyun Park,Han L.Lee,Woo June Choi,and Taeho Im be identified as the authors of thiswork has been asserted in accordance with law.Registered OfficeJohn Wiley&Sons,Inc.,111 River Street,Hoboken,NJ 07030,USAEditorial

4、Office111 River Street,Hoboken,NJ 07030,USAFor details of our global editorial offices,customer services,and more information about Wileyproducts visit us at .Wiley also publishes its books in a variety of electronic formats and by print-on-demand.Somecontent that appears in standard print versions

5、of this book may not be available in other formats.Limit of Liability/Disclaimer of WarrantyMATLABis a trademark of The MathWorks,Inc.and is used with permission.The MathWorksdoes not warrant the accuracy of the text or exercises in this book.This works use or discussion ofMATLABsoftware or related

6、products does not constitute endorsement or sponsorship by TheMathWorks of a particular pedagogical approach or particular use of the MATLABsoftware.While the publisher and authors have used their best efforts in preparing this work,they make norepresentations or warranties with respect to the accur

7、acy or completeness of the contents ofthis work and specifically disclaim all warranties,including without limitation any impliedwarranties of merchantability or fitness for a particular purpose.No warranty may be created orextended by sales representatives,written sales materials or promotional sta

8、tements for this work.The fact that an organization,website,or product is referred to in this work as a citation and/orpotential source of further information does not mean that the publisher and authors endorse theinformation or services the organization,website,or product may provide or recommenda

9、tionsitmaymake.Thisworkissoldwiththeunderstandingthatthepublisherisnotengagedinrenderingprofessional services.The advice and strategies contained herein may not be suitable for yoursituation.You should consult with a specialist where appropriate.Further,readers should be awarethat websites listed in

10、 this work may have changed or disappeared between when this work waswritten and when it is read.Neither the publisher nor authors shall be liable for any loss of profitor any other commercial damages,including but not limited to special,incidental,consequential,or other damages.Library of Congress

11、Cataloging-in-Publication data applied forISBN:9781119598923Cover design:WileyCover image:green_01/ShutterstockSet in 10/12pt Warnock by SPi Global,Pondicherry,IndiaPrinted in the United States of America10987654321To our parents and familieswho love and support usandto our teachers and studentswho

12、enriched our knowledgeContentsPrefacexiiiAbout the Companion Websitexv1Load Line Analysis and Fourier Series11.1Load Line Analysis11.1.1Load Line Analysis of a Nonlinear Resistor Circuit31.1.2Load Line Analysis of a Nonlinear RL circuit71.2Voltage-Current Source Transformation101.3Thevenin/Norton Eq

13、uivalent Circuits111.4Millers Theorem181.5Fourier Series181.5.1Computation of Fourier Coefficients Using Symmetry201.5.2Circuit Analysis Using Fourier Series291.5.3RMS Value and Distortion Factor of a Non-SinusoidalPeriodic Signal35Problems362Diode Circuits432.1The v-i Characteristic of Diodes432.1.

14、1Large-Signal Diode Model for Switching Operations442.1.2Small-Signal Diode Model for Amplifying Operations442.2Analysis/Simulation of Diode Circuits462.2.1Examples of Diode Circuits462.2.2Clipper/Clamper Circuits512.2.3Half-wave Rectifier532.2.4Half-wave Rectifier with Capacitor Peak Rectifier532.2

15、.5Full-wave Rectifier572.2.6Full-wave Rectifier with LC Filter592.2.7Precision Rectifiers622.2.7.1Improved Precision Half-wave Rectifier63vii2.2.7.2Precision Full-wave Rectifier652.2.8Small-Signal(AC)Analysis of Diode Circuits672.3Zender Diodes75Problems853BJT Circuits1053.1BJT(Bipolar Junction Tran

16、sistor)1063.1.1Ebers-Moll Representation of BJT1063.1.2Operation Modes(Regions)of BJT1093.1.3Parameters of BJT1093.1.4Common-Base Configuration1113.1.5Common-Emitter Configuration1133.1.6Large-Signal(DC)Model of BJT1153.1.7Small-Signal(AC)Model of BJT1423.1.8Analysis of BJT Circuits1433.1.9BJT Curre

17、nt Mirror1563.1.10BJT Inverter/Switch1613.1.11Emitter-Coupled Differential Pair1653.2BJT Amplifier Circuits1683.2.1Common-Emitter(CE)Amplifier1693.2.2Common-Collector(CC)Amplifier(Emitter Follower)1733.2.3Common-Base(CB)Amplifier1803.2.4Multistage Cascaded BJT Amplifier1873.2.5Composite/Compound Mul

18、ti-Stage BJT Amplifier1993.3Logic Gates Using Diodes/TransistorsC-3,M-12093.3.1DTL NAND Gate2093.3.2TTL NAND Gate2153.3.2.1Basic TTL NAND Gate Using Two BJTs2153.3.2.2TTL NAND Gate Using Three BJTs2183.3.2.3Totem-Pole Output Stage2223.3.2.4Open-Collector Output and Tristate Output2273.3.3ECL(Emitter

19、-Coupled Logic)OR/NOR Gate2293.4Design of BJT Amplifier2393.4.1Design of CE Amplifier with Specified Voltage Gain2323.4.2Design of CC Amplifier(Emitter Follower)with Specified InputResistance2393.5BJT Amplifier Frequency Response2433.5.1CE Amplifier2433.5.2CC Amplifier(Emitter Follower)2483.5.3CB Am

20、plifier2553.6BJT Inverter Time Response259Problems266Contentsviii4FET Circuits3034.1Field-Effect Transistor(FET)3034.1.1JFET(Junction FET)3044.1.2MOSFET(Metal-Oxide-Semiconductor FET)3134.1.3MOSFET Used as a Resistor3274.1.4FET Current Mirror3284.1.5MOSFET Inverter3384.1.5.1NMOS Inverter Using an En

21、hancement NMOS as a Load3424.1.5.2NMOS Inverter Using a Depletion NMOS as a Load3474.1.5.3CMOS Inverter3504.1.6Source-Coupled Differential Pair3554.1.7CMOS Logic Circuits3594.2FET Amplifer3604.2.1Common-Source(CS)Amplifier3624.2.2CD Amplifier(Source Follower)3664.2.3Common-Gate(CG)Amplifier3704.2.4C

22、ommon-Source(CS)Amplifier with FET Load3734.2.4.1CS Amplifier with an Enhancement FET Load3734.2.4.2CS Amplifier with a Depletion FET Load3764.2.5Multistage FET Amplifiers3804.3Design of FET Amplifier3984.3.1Design of CS Amplifier3984.3.2Design of CD Amplifier4054.4FET Amplifier Frequency Response40

23、94.4.1CS Amplifier4104.4.2CD Amplifier(Source Follower)4154.4.3CG Amplifier4194.5FET Inverter Time Response423Problems4285OP Amp Circuits4675.1OP Amp BasicsY-14685.2OP Amp Circuits with ResistorsY-14715.2.1OP Amp Circuits with Negative Feedback4715.2.1.1Inverting OP Amp Circuit4715.2.1.2Non-Invertin

24、g OP Amp Circuit4735.2.1.3Voltage Follower4765.2.1.4Linear Combiner4775.2.2OP Amp Circuits with Positive Feedback4795.2.2.1Inverting Positive Feedback OP Amp Circuit4805.2.2.2Non-Inverting Positive Feedback OP Amp Circuit4815.3First-Order OP Amp CircuitsY-1485Contentsix5.3.1First-Order OP Amp Circui

25、ts with Negative Feedback4855.3.2First-Order OP Amp Circuits with Positive Feedback4875.3.2.1Square(Rectangular)-Wave Generator4875.3.2.2Rectangular/Triangular-Wave Generator4905.3.3555 Timer Using OP Amp as Comparator4925.4Second-Order OP Amp CircuitsY-14955.4.1MFB(Multi-FeedBack)Topology4955.4.2Sa

26、llen-Key Topology4965.5Active FilterY-15025.5.1First-Order Active Filter5025.5.2Second-Order Active LPF/HPF5035.5.3Second-Order Active BPF5055.5.4Second-Order Active BSF507Problems5126Analog Filter5236.1Analog Filter Design5236.2Passive Filter5336.2.1Low-pass Filter(LPF)5336.2.1.1Series LR Circuit53

27、36.2.1.2Series RC Circuit5356.2.2High-pass Filter(HPF)5356.2.2.1Series CR Circuit5356.2.2.2Series RL Circuit5366.2.3Band-pass Filter(BPF)5376.2.3.1Series Resistor,an Inductor,and a Capacitor(RLC)Circuit and SeriesResonance5366.2.3.2Parallel RLC Circuit and Parallel Resonance5396.2.4Band-stop Filter(

28、BSF)5416.2.4.1Series RLC Circuit5416.2.4.2Parallel RLC Circuit5446.2.5Quality Factor5456.2.6Insertion Loss5496.2.7Frequency Scaling and Transformation5496.3Passive Filter Realization5536.3.1LC Ladder5536.3.2L-Type Impedance Matcher5616.3.3T-and-Type Impedance Matchers5656.3.4Tapped-C Impedance Match

29、ers5716.4Active Filter Realization576Problems586Contentsx7Smith Chart and Impedance Matching6017.1Transmission Line6017.2Smith Chart6087.3Impedance Matching Using Smith Chart6167.3.1Reactance Effect of a Lossless Line6167.3.2Single-Stub Impedance Matching6187.3.2.1Shunt-Connected Single Stub6187.3.2

30、.2Series-Connected Single Stub6227.3.3Double-Stub Impedance Matching6267.3.4The Quarter-Wave Transformer6317.3.4.1Binomial Multisection QWT6337.3.4.2Chebyshev Multisection QWT6347.3.5Filter Implementation Using StubsP-16357.3.6Impedance Matching with Lumped Elements646Problems6618Two-Port Network an

31、d Parameters6778.1Two-Port ParametersY-16778.1.1Definitions and Examples of Two-Port Parameters6788.1.2Relationships Among Two-Port Parameters6858.1.3Interconnection of Two-Port Networks6898.1.3.1Series Connection and z-parameters6908.1.3.2Parallel(Shunt)Connection and y-parameters6908.1.3.3Series-P

32、arallel(Shunt)Connection and h-parameters6918.1.3.4Parallel(Shunt)-Series Connection and g-parameters6918.1.3.5Cascade Connection and a-parameters6928.1.4Curse of Port Condition6928.1.5Circuit Models with Given Parameters6978.1.5.1Circuit Model with Given z-parameters6978.1.5.2Circuit Model with Giv

33、en y-parameters6998.1.5.3Circuit Model with Given a/b-parameters6998.1.5.4Circuit Model with Given h/g-parameters6998.1.6Properties of Two-Port Networks with Source/Load7008.2Scattering Parameters7098.2.1Definition of Scattering Parameters7098.2.2Two-Port Network with Source/Load7148.3Gain and Stability7238.3.1Two-Port Power GainsL-1,P-17238.3.2StabilityE-1,L-1,P-17288.3.3Design for Maximum GainM-