STM32L4低功耗模式介绍.pdf

STM32L4低功耗模式介绍.pdf

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PowermanagementMCUDivisionApplicationsPowerschemes（1/3）4502/07/2015LCD2OPAMP2COMP3ADC2DACVREFbufferVREF+VDDAVLCDLCDboosterUSBtransceiversVDDUSBCPUSRAM1SRAM2DigitalperipheralsVCOREVDDI/OringVDDIO1I/OringFlashVoltageRegulatorStandbycircuitry（wakeup,IWDG）ResetblockTemp.sensor3PLL,HSI,MSIVDDIO2VDDIO2BackupdomainLSE,RTC,backupregistersVBATVoltageRegulatorTwoembeddedlinearvoltageregulatorsupplyallthedigitalcircuitriesexceptfortheStandbycircuitryandtheBackupdomain.Theregulatoroutputvoltage（VCORE）canbeprogrammedbysoftwaretotwodifferentrangeswithin1.0-1.2V（typical）.ThismethodiscalledDynamicVoltageScaling.RegulatorVoltageRange1:

VCORE=1.2VRegulatorVoltageRange2:

VCORE=1.0VDependingontheapplicationmode,theVCOREisprovidedeitherbymainregulator（MR）orbythelow-powerregulator（LPR）Mainvoltageregulatormode（MVR）forRunandSleepmodes.Low-powerregulatorforLPrun,LPsleep,Stop1andStop2modes.RegulatorsOFFinStandbyandShutdownmode.WhenSRAM2contentispreservedinShutdownmode,theLPRremainsONandprovidesSRAM2supply/464647PoweroptimizationversusfrequencyThankstovoltagescalingandlowpowerregulatorRUNconsumptioncanbeoptimizeddowntolowfrequencies0501001502002503003504004505000.1110100Consumption（A/MHz）Frequency（MHz）Currentconsumption（A/MHz）CurrentfromFlashARTOn（A/MHz）CurrentfromFlashARTOff（A/MHz）CurrentfromSRAM1（A/MHz）CurrentfromSRAM2（A/MHz）Low-powerrunRange2Range148PoweroptimizationversusfrequencyFlashhassmalldynamicconsumption=benefitswhentheFWhasalimitedcacheusage.0200040006000800010000120000102030405060708090Consumption（A）Frequency（MHz）Currentconsumption（A）CurrentfromFlashARTOn（A/MHz）CurrentfromFlashARTOff（A/MHz）CurrentfromSRAM1（A/MHz）CurrentfromSRAM2（A/MHz）Range1Range2Low-powerrun3WS4WS2WS1WS3WS2WS1WS0WSRunandLow-powerrunmodesSeveraloptionsdependingonrequiredperformanceandconsumption:

Range1forSYSCLKupto80MHzRange2forSYSCLKupto26MHzVoltagescalingrangeselectedwithVOS1:

0bitsinPWR_CR1Clocksourcemaxfrequencydependingonvoltagescalingrange:

4949VoltagerangeMSIHSIHSEPLLRange148MHzrange16MHz48MHz80MHzVCOmax=344MHzRange224MHzrange16MHz26MHz26MHzVCOmax=128MHz50DynamicvoltagescalinginRunmode?

Voltagescalingoptimizestheproductefficiency（ConsumptionvsPerformance）?

UserselectsaRange（voltagescaling）accordingto:

?

Performancerequired?

Maxpowerconsumption2VSYSCLK（MHz）616321WS1WSVDD1.71V.3.6VVCORELow-powerrunVCORE=1.1VRange2VCORE=1.0VRange1VCORE=1.2V5012182648641WS2WS3WS1WS802WS3WS4WS0WS0WS0WS127A/MHz80MHz111A/MHz26MHz136A/MHz26MHzRunandLow-powerrunmodesEachperipheralclockcanbeconfiguredtobeONorOFFinRunandLow-powerrunmodesthankstoRCC_AHB1ENR,RCC_AHB2ENR,RCC_AHB3ENR,RCC_APB1ENR1,RCC_APB1ENR2,RCC_APB2ENRFortheperipheralswithindependentclock:

thebitcontrolsbothAHB/APBandkernelclockBydefaultallperipheralclocksareOFF,exceptFlashinterfaceclockSRAM1andSRAM2clocksarealwaysONinRunmodeWhenrunningfromSRAM1orSRAM2（inRunorLow-powerrun）:

Flashcanputinpower-downmodebysettingRUN_PDbitinFLASH_ACRFlashclockcanbeswitchedoffbyclearingFLASHENbitinRCC_AHB1ENRFlashMUSTNOTbeaccessedwhenitisswitchedoff（nohardwareprotection）=interruptmustbemappedinSRAM（usingVectorTableOffsetRegisterCortexM4register）5151STM32L4PowerModeRunmode52LowPowerregulator（LPR）upto2MHzSRAM1（96KB）SRAM2（32KB）CortexM4Flash（1MB）Range1（upto80MHZ）RunModeRange1Ex:

executionfromFlashRange2111uA/MHzat26MHz（2.9mA）Range1127uA/MHzat80MHz（10.2mA）ActivecellFrozencellMainregulator（MR）AvailablePeriphandclockUSBOTGSDMMCSAIAvailablePeripheralFSMCQUADSPIPVD,PVMLCDUSARTLPUARTI2C1/I2C2I2C3SPICANADCDACOPAMPCOMPSWPMIDFSDMTempSensorTimersLPTIM1LPTIM2TouchSensRNGAESCRCIWDGWWDGSystickTimerHSELSILSEMSIHSIAvailableClockCellinpower-downGPIODMABORRange2（upto26MHZ）STM32L4PowerModeRunmode53LowPowerregulator（LPR）upto2MHzSRAM1（96KB）SRAM2（32KB）CortexM4Range2（upto26MHZ）RunModeRange2Ex:

executionfromSRAMRange2fromSRAM1111uA/MHzat26MHz（2,9mA）Range1fromSRAM1127uA/MHzat80MHz（10,2mA）ActivecellFrozencellMainregulator（MR）AvailablePeriphandclockUSBOTGSDMMCSAIAvailablePeripheralPVD,PVMLCDUSARTLPUARTI2C1/I2C2I2C3SPICANADCDACOPAMPCOMPSWPMIDFSDMTempSensorTimersLPTIM1LPTIM2TouchSensRNGAESCRCIWDGWWDGSystickTimerHSELSILSEMSIHSIAvailableClockCellinpower-downFlash（1MB）GPIODMABORFSMCQUADSPIRange1（upto80MHZ）RunandLow-powerrunmodesCurrentconsumptioninRunmodedependsonseveralparameters:

Executedbinarycode（programitself+compilerimpact）ProgramlocationinmemoryDevicesoftwareconfigurationI/OpinloadingandswitchingrateTemperatureExecutionfromFlashorSRAMWhenexecutionfromFlash:

ARTacceleratorconfiguration（Cache,Prefetch）WhenexecutionfromSRAM:

SRAM1orSRAM25454RunandLow-powerrunmodesWhenexecutingfromFlash,thebestconfigurationis:

I-CACHEON,D-CACHEON,PREFETCHOFF5555ARTON（CacheON,PrefetchOff）ARTOFFRange180MHz（4WS）Consumption（mA/MHz）0,1360.117Performance（Coremark/MHz）3.321,55EnergyEfficiency（Coremark/mA）24.413.2Range226MHz（3WS）Consumption（mA/MHz）0,1180,111Performance（Coremark/MHz）3.351,85EnergyEfficiency（Coremark/mA）28,416,6RunandLow-powerrunmodesWhenexecutingfromSRAM,thebestconfigurationis:

ExecutionfromSRAM25656Code&DatainSRAM1CodeinSRAM2,DatainSRAM1Range180MHzConsumption（mA/MHz）0,1300.137Performance（Coremark/MHz）2,373,42EnergyEfficiency（Coremark/mA）18,225,0STM32L4PowerModeLow-powerrunmode57LowPowerregulator（LPR）upto2MHzSRAM1（96KB）SRAM2（32KB）CortexM4Flash（1MB）Range1（upto80MHZ）Range2（upto26MHZ）Low-powerrunmodeEx:

executionfromFlashFromSRAM1121A/MHzat2MHz（242A）fromFlash136A/MHzat2MHz（272A）ActivecellFrozencellMainregulator（MR）AvailablePeriphandclockUSBOTGSDMMCSAIAvailablePeripheralFSMCQUADSPIPVD,PVMLCDUSARTLPUARTI2C1/I2C2I2C3SPICANADCDACOPAMPCOMPSWPMIDFSDMTempSensorTimersLPTIM1LPTIM2TouchSensRNGAESCRCIWDGWWDGSystickTimerHSELSILSEMSIHSIAvailableClockCellinpower-downDMAGPIODMABORFSMCQUADSPISleepandLow-powersleepmodesSleepandLow-powersleepmode:

Corestopped,peripheralskeptrunningEnteredfrombyexecutingspecialinstructionsWFI（WaitForInterrupt）Exit:

anyperipheralinterruptacknowledgedbytheNestedVectoredInterruptController（NVIC）WFE（WaitForEvent）AneventcanbeaninterruptenabledintheperipheralcontrolregisterbutNOTintheNVICoranEXTIlineconfiguredineventmodeExit:

assoonastheeventoccurs?

Notimewastedininterruptentry/exitTwomechanismstoenterthismodeSleepNow:

MCUentersSLEEPmodeassoonasWFI/WFEinstructionareexecutedSleeponExit:

MCUentersSLEEPmodeassoonasitexitsthelowestpriorityISRThestackisnotpoppedbeforeenteringthesleep,itwillnotbepushedwhenthenextinterruptoccurs,savingrunningtimeControlledbyCortexM4regSystemControlRegisterSLEEPONEXIT5858SleepandLow-powersleepmodesEnteredbyexecutingWFIorWFEeitherwhenMainregulatorisON=SleepmodeMainregulatorisOFF=Low-powersleepmodeEachperipheralclockcanbeconfiguredtobeONorOFFinSleeporLow-powersleepmodesthankstoRCC_AHB1SMENR,RCC_AHB2SMENR,RCC_AHB3SMENR,RCC_APB1SMENR1,RCC_APB1SMENR2,RCC_APB2SMENRFortheperipheralswithindependentclock:

thebitcontrolsbothAHB/APBandkernelclockThisbitcontrolsalsothekernelclockinStopmodeBydefault,FLASH,SRAM1andSRAM2clocksareONinSleeporLow-powersleepmodesTheycanbedisabledduringSleep/Low-powersleepbyclearingFLASHSMEN,SRAM1SMEN,SRAM2SMENFlashcanbeputinpower-downduringSleep/Low-powersleepbysettingSLEEP_PDinFLASH_ACR5959STM32L4PowerModeSleepmode60LowPowerregulator（LPR）upto2MHzSRAM1（96KB）SRAM2（32KB）CortexM4Flash（1MB）Range1（upto80MHZ）SleepModeRange1Ex:

FlashON,SRAMsON（default）Range235A/MHzat26MHz（0,92mA）Range137A/MHzat80MHz（2,96mA）ActivecellFrozencellMainregulator（MR）AvailablePeriphandclockUSBOTGSDMMCSAIAvailablePeripheralFSMCQUADSPIPVD,PVMLCDUSARTLPUARTI2C1/I2C2I2C3SPICANADCDACOPAMPCOMPSWPMIDFSDMTempSensorTimersLPTIM1LPTIM2TouchSensRNGAESCRCIWDGWWDGSystickTimerHSELSILSEMSIHSIAvailableClockCellinpower-downZzzDMAGPIODMABORFSMCQUADSPIRange2（upto26MHZ）STM32L4PowerModeLow-powersleepmode61LowPowerregulator（LPR）upto2MHzSRAM1（96KB）SRAM2（32KB）CortexM4Flash（1MB）Range1（upto80MHZ）Range2（upto26MHZ）Low-powersleepmodeEx:

FlashOFF,SRAM1OFFFlashOFF,SRAMsOFF40,5A/MHzat2MHz（81A）FlashON,SRAMsOFF48A/MHzat2MHz（96A）ActivecellFrozencellMainregulator（MR）AvailablePeriphandclockUSBOTGSDMMCSAIAvailablePeripheralFSMCQUADSPIPVD,PVMLCDUSARTLPUARTI2C1/I2C2I2C3SPICANADCDACOPAMPCOMPSWPMIDFSDMTempSensorTimersLPTIM1LPTIM2TouchSensRNGAESCRCIWDGWWDGSystickTimerHSELSILSEMSIHSIAvailableClockCellinpower-downZzzDMAGPIODMABORFSMCQUADSPIBatchAcquisitionmode（BAM）Optimizedmodefortransferringdatawithcommunicationperipherals,whiletherestofthedeviceisinlowpower.1.Onlytheneededcommunicationperipheral+1DMA+1SRAM（SRAM1orSRAM2）areconfiguredwithclockenableinSleepmode2.Flashisputinpower-downmodeandFlashclockisgatedoffduringSleep3.EntereitherSleeporLow-powersleepmode?

NotethatI2Cclockcanbeat16MHzeveninlow-powersleepmode,allowing1MHzFast-modePlussupport.U（S）ART/LPUARTclockcanalsobeHSI.6262Low-powermodesNextlow-powermodesareselectedwithLPMSinPWR_CR1LPMS=000:

Stop1modeselectionwithregulatorinmainmodeLPMS=001:

Stop1modeselectionwithregulatorinlow-powermodeLPMS=010:

Stop2modeselectionLPMS=011:

StandbymodeselectionLPMS=1xx:

ShutdownmodeselectionBeforeenteringStop2mode:

AlltheperipheralswhichcannotbeenabledinStop2modemustbeeitherdisabledbyclearingtheEnablebitinthepe