FE11s.docx
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FE11s
FE1.1s
USB2.04-PortHub
DataSheetRev.B0.1
FE1.1S–*****NB
USB2.0HIGHSPEED4-PORTHUB*****LER
_______________________DataSheet_______________________
*****CTION
TheFE1.1sisahighlyintegrated,highquality,
highperformance,lowpowerconsumption,yet
lowcostsolutionforUSB4-PortHub.Itisfully
compliantto“UniversalSerialBusSpecification
Revision2.0”,andsupportsUSB-IF“Battery
ChargingSpecificationRevision1.1”.
ItadoptsSingleTransactionTranslator（STT）
architecturetobemorecosteffective.Six,
insteadoftwo,non-periodictransactionbuffers
areusedtominimizepotentialtrafficjamming.
Thewholedesignisbasedonstate-machinecontrol
toreducetheresponsedelaytime;no
microcontrollerisusedinthischip.
Toguaranteehighquality,thewholechipis
coveredbyTestScanChain–evenonthehigh
speed（480MHz）modules,sothatallthelogic
componentscouldbefullytestedbeforeshipping.
SpecialBuild-In-Self-Testmodeisdesignedto
exerciseallhigh,full,andlowspeedAnalog
FrontEnd（AFE）componentsonthepackaging
andtestingstagesaswell.
Lowpowerconsumptionisachievedbyusing
advancedtechnologyandcomprehensive
power/clockcontrolmechanism.
FE1.1scouldbeoptionallyconfiguredtosupport
ChargingDownstreamPortsasdefinedbythe
USB-IFBatteryChargingSpecification.With
thisfeatureenabled,anUSBhubcouldbeeasily
transformedintoachargingstationforbattery
basedportabledevices.
*****S
.
FullycompliantwithUniversalSerialBus
SpecificationRevision2.0（USB2.0）;
□
UpstreamfacingportsupportsHigh-
Speed（480MHz）andFull-Speed
（12MHz）modes;
□
4downstreamfacingportssupport
High-Speed（480MHz）,Full-Speed
（12MHz）,andLow-Speed（1.5MHz）
modes;
.
IntegratedUSB2.0Transceivers;
.
Integratedupstream1.5KΩpull-up,
downstream15KΩpull-down,andserial
resisters;
.
Integrated5Vto3.3Vand1.8Vregulator.
.
IntegratedPower-On-Resetcircuit;
.
Integrated12MHzOscillatorwithfeedback
resister,andcrystalloadcapacitance;
.
Integrated12MHz-to-480MHzPhaseLock
Loop（PLL）;
April29,2009
SubjecttoChangeWithoutNotice
1
USB2.04-PortHub
DataSheetRev.B0.1
.
SingleTransactionTranslator（STT）–
□
OneTTforalldownstreamports;
□
TheTTcouldhandle64periodicStart-
Splittransactions,32periodic
Complete-Splittransactions,and6
none-periodictransactions;
.
Automaticself-powerstatusmonitoring;
□
Automaticre-enumerationwhenSelf-
PoweredswitchingtoBus-Powered;
.
GangedPowerControlandGlobalOver-
CurrentDetectionsupport;
.
EEPROMconfiguredoptions–
□
VendorID,ProductID,Device
ReleaseNumber;and
□
NumberofDownstreamPorts;
.
ComprehensivePortIndicatorssupport:
□
DownstreamPortEnabledindicator
LED（x4,Green）;
□
HubActive/SuspendindicatorLED.
.
Supportschargingportdetectionmechanism
onall4downstreamports.
April29,2009
SubjecttoChangeWithoutNotice
2
USB2.04-PortHub
DataSheetRev.B0.1
BLOCK*****
ToDownstreamToUpstream
DevicesHost/Hub
OverCurrent
Detection
PowerSwitch
Control
EEPROM,
HubActivity
LED
Port
Indicators
Fig.1:
BlockDiagram
Upstream
PHY
RoutingSwitch
Data
Transmit
Data
Recovery
Elastic
Buffer
USBMulti-portTransceiverMacroCell
SIE
Downstream
Port
Controllers
Upstream
Port
Controller
TransactionTranslator
Full/Low-SpeedHandler
TransactionTranslator
Hub
High-SpeedHandlerHubController
TranslatorBuffer（2KB）
LED
Controller
UnifiedTransaction
USB2.0
Controller
Down-
stream
PHY#1
Down-
stream
PHY#2
Down-
stream
PHY#3
Down-
stream
PHY#4
12MHz
Crystal3.3V1.8VRegulatorPLL
（x40）OSCPOR
April29,2009SubjecttoChangeWithoutNotice
3
USB2.04-PortHub
DataSheetRev.B0.1
*****
28-pinSSOP
（BodySize:
10x4mm,Pitch:
0.64mm）
PIN*****ENT
VSS
XOUT
XIN
DM4
DP4
DM3
DP3
DM2
DP2
DM1
DP1
VD18
VD33
REXT
FE1.1s
Rev.B
1
13
12
1514
11
10
9
8
7
6
5
4
2
3
16
17
18
19
20
21
22
23
24
25
26
27
28
VD18
TESTJ
OVCJ
PWRJ
LED2
LED1
DRV
VD33_O
VDD5
BUSJ
VBUSM
XRSTJ
DPU
DMU
Fig.2:
SSOP-28PinAssignment
April29,2009SubjecttoChangeWithoutNotice
4
USB2.04-PortHub
DataSheetRev.B0.1
PIN*****TIONTABLE
PinNamePinNoType
VSS1P
XOUT2OSC
XIN3OSC
DM44UT
DP45UT
DM36UT
DP37UT
DM28UT
DP29UT
DM110UT
DP111UT
VD1812,28P
VD3313P
REXT14
DMU15UT
DPU16UT
XRSTJ17I
VBUSM18I
BUSJ19I
VDD520P
VD33_O21P
FunctionNote
Ground.
12MHzCrystalOscillatoroutput1
12MHzCrystalOscillatorinput.1
TheD-pinofthe4thDownstreamFacingPort.
TheD+pinofthe4thDownstreamFacingPort.
TheD-pinofthe3rdDownstreamFacingPort.
TheD+pinofthe3rdDownstreamFacingPort.
TheD-pinofthe2ndDownstreamFacingPort.
TheD+pinofthe2ndDownstreamFacingPort.
TheD-pinofthe1stDownstreamFacingPort.
TheD+pinofthe1stDownstreamFacingPort.
1.8Vpoweroutput
3.3Vpowerinputfor3.3V→1.8Vintegratedregulator.
ExternalBiasResisters:
A2.7KΩ（±1%）resistershouldbeconnectedtoVSStoprovideinternal
biasreference.
TheD-pinoftheUpstreamFacingPort.
TheD+pinoftheUpstreamFacingPort.
ExternalReset:
activelow,isanoptionalsourceofchipresetsignal.Theminimumlow
pulsewidthis10μs.Innormalapplications,thereisnoneedforthis
signal,andshouldbetiedtohigh.
UpstreamPortPowerMonitor:
ThispinmonitorsthepowerstateofVBUSfromupstreamfacingport.
Highlevelindicatesthatthehostispoweredupandthehubshould
functionnormally.Lowlevelindicatesthatthehostispowereddown,
andthehubshouldbeinpower-downstate.
BusPowerSense:
Thispinidentifytheprimarypowersourceofthehub.Highlevel
indicatesthehubisSelf-Poweredandhasenoughstrengthtosupport
High-Powerdevicesonitsdownstreamports.Otherwise,itisBus-
Poweredandeachdownstreamportsarepresumedtosupply100mAof
poweronly.
5Vpowerinputforintegrated5V→3.3Vregulator.
3.3Vpoweroutputfrom5V→3.3Vintegratedregulator–a10μF
decouplingcapacitorisrequired.
April29,2009SubjecttoChangeWithoutNotice
5
USB2.04-PortHub
DataSheetRev.B0.1
DRV/22
CHRGEN
LED1/23
EESCL
LED2/24
JLEDEN
PWRJ25
OVCJ26
TESTJ/27
EESDA
I/O
I/O
I/O
OD
I
OD-PU
LEDDriveControl/ChargingHubEnable
Duringpower-on-reset,thispinisusedasChargingHubEnable.Ifitis
tiedtohigh,thebatterychargingfunctionwillbeenabled.Otherwise,it
isanormalhubandthispinfunctionsasLEDdrivingcontrolpin.
LEDControl1/ExternalEEPROMClock
Port1andPort3deviceconnectedindicator（LED）control;or,when
LED2istiedtohighduringpower-on-reset,itisthejointindicatorforall
ports.Atthesametime,itcouldalsobeusedastheclock（SCL）of
externalEEPROM.
LEDControl2/JointLEDIndicatorEnable
Port2andPort4deviceconnectedindicator（LED）control.During
power-on-reset,itisaconfigurationinputforenablingJointPortIndicator
bytyingto3.3V.
PowerEnable
Thisisanactivelow,open-drainoutputsignalforcontrollingpowertothe
downstreamdevicesinGangedPowerSwitchingmode.Itisenabledand
disabledbythehosthubdrivertoreducethein-rushcurrentorin
responsetoOver-CurrentDetection.
OverCurrentSense
Activelowinputfromexternalcurrentmonitorindicatingover-current
conditionforGlobalOver-CurrentProtection.
TestModeEnable/ExternalEEPROMSerialData
Activelow,opendrainsignalwithinternalpull-upresistor.Whentiedto
lowduringpower-on-reset,thechipwillbesetintestmode.Thetest
modeisforfactorytestonly,forallapplications,thispinshouldbeeither
leftasNo-ConnectionorconnectedtotheSerialData/Address（SDA）pin
ofexternal2-wireEEPROM.
TypeAbbreviation–
I:
SchmittTriggerInput,3.3V5V-Tolerant;
O:
Output（drivingstrength:
8mA）;
OD:
Output,OpenDrain（sinkcurrent:
4mA）;
OD-PU:
3.3VInput/Output,OpenDrainwithInternalPull-Up（sinkcurrent:
4mA）
I-PU:
3.3VInputwithInternalPull-Up;
UTD:
USBDownstreamFacingPortTransceiver（supportingHigh/Full/LowSpeed）.
UTU:
USBUpstreamFacingPortTransceiver（supportingHigh/FullSpeed）.
OSC:
CrystalOscillator（withintegratedfeedbackresister,andcrystalloadcapacitor）.
P:
Power/Ground.
Note1–CrystalRequirements
.
Frequencyaccuracy:
12MHz±50ppm
.
Loadcapacitance:
16pF~20pF
April29,2009SubjecttoChangeWithoutNotice
6
USB2.04-PortHub
DataSheetRev.B0.1
*****TION*****TIVES
TheFE1.1scanbeconfiguredthroughboarddesignoptionsinoneofthreemodes–IndividualPort
ActiveIndicatormode,JointPortActiveIndicatormode,andUSBBatteryChargingHubmore.Each
modecouldincorporateanoptionalexternalserialEEPROMforcustomizingVendorID,ProductID,
DeviceReleaseNumber,andnumberofports.ThedetailedlayoutofEEPROMcontentsisexplainedin
thefollowingsection.
AlltheseoptionsareimplementedthroughfourpinsofFE1.1s:
DRV,LED1,LED2,andTEST.
IndividualPortActiveIndicatorMode
Inthismode,asshownbyFig.3,FE1.1ssupportsupto5LED“s.ThereisonegreenLEDforeach
downstreamportandoneredLEDforhubactive/suspendindication.Thegreenlightturnson
wheneveradeviceproperlyattachedtoitscorrespondingport,andturnsoffwheniti
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