XPS程序分析Word格式.docx
《XPS程序分析Word格式.docx》由会员分享,可在线阅读,更多相关《XPS程序分析Word格式.docx(55页珍藏版)》请在冰点文库上搜索。
PORTuserio_hexdisp_right=userio_hexdisp_right,DIR=O,VEC=[6:
PORTuserio_hexdisp_left_dp=userio_hexdisp_left_dp,DIR=O
PORTuserio_hexdisp_right_dp=userio_hexdisp_right_dp,DIR=O
PORTuserio_rfa_led_red=userio_rfa_led_red,DIR=O
PORTuserio_rfa_led_green=userio_rfa_led_green,DIR=O
PORTuserio_rfb_led_red=userio_rfb_led_red,DIR=O
PORTuserio_rfb_led_green=userio_rfb_led_green,DIR=O
#Ethernetpins
PORTETH_COMA=net_gnd,DIR=O
#ETH_A
PORTETH_A_PHY_RST_N=ETH_A_PHY_RST_N,DIR=O
PORTETH_A_MDIO=ETH_A_MDIO,DIR=IO
PORTETH_A_MDC=ETH_A_MDC,DIR=O
PORTETH_A_RGMII_TXC=ETH_A_RGMII_TXC,DIR=O
PORTETH_A_RGMII_TX_CTL=ETH_A_RGMII_TX_CTL,DIR=O
PORTETH_A_RGMII_TXD=ETH_A_RGMII_TXD,DIR=O,VEC=[3:
PORTETH_A_RGMII_RXC=ETH_A_RGMII_RXC,DIR=I
PORTETH_A_RGMII_RX_CTL=ETH_A_RGMII_RX_CTL,DIR=I
PORTETH_A_RGMII_RXD=ETH_A_RGMII_RXD,DIR=I,VEC=[3:
PORTETH_A_PD=net_gnd,DIR=O
#ETH_B
PORTETH_B_MDIO=ETH_B_MDIO,DIR=IO
PORTETH_B_MDC=ETH_B_MDC,DIR=O
PORTETH_B_RGMII_TXC=ETH_B_RGMII_TXC,DIR=O
PORTETH_B_RGMII_TX_CTL=ETH_B_RGMII_TX_CTL,DIR=O
PORTETH_B_RGMII_TXD=ETH_B_RGMII_TXD,DIR=O,VEC=[3:
PORTETH_B_RGMII_RXC=ETH_B_RGMII_RXC,DIR=I
PORTETH_B_RGMII_RX_CTL=ETH_B_RGMII_RX_CTL,DIR=I
PORTETH_B_RGMII_RXD=ETH_B_RGMII_RXD,DIR=I,VEC=[3:
PORTETH_B_PD=net_gnd,DIR=O
#USBUART
PORTusb_uart_rx=usb_uart_rx,DIR=I
PORTusb_uart_tx=usb_uart_tx,DIR=O
#AD9512clockbuffercontrolpins(RFreference&
samplingclocks)
PORTclk_rfref_spi_cs_n_pin=clk_rfref_spi_cs_n,DIR=O
PORTclk_rfref_spi_mosi_pin=clk_rfref_spi_mosi,DIR=O
PORTclk_rfref_spi_sclk_pin=clk_rfref_spi_sclk,DIR=O
PORTclk_rfref_spi_miso_pin=clk_rfref_spi_miso,DIR=I
PORTclk_rfref_func_pin=net_vcc,DIR=O
PORTclk_samp_spi_cs_n_pin=clk_samp_spi_cs_n,DIR=O
PORTclk_samp_spi_mosi_pin=clk_samp_spi_mosi,DIR=O
PORTclk_samp_spi_sclk_pin=clk_samp_spi_sclk,DIR=O
PORTclk_samp_spi_miso_pin=clk_samp_spi_miso,DIR=I
PORTclk_samp_func_pin=net_vcc,DIR=O
#IICEEPROMpinson-board
PORTiic_eeprom_onboard_scl_pin=iic_eeprom_onboard_scl_pin,DIR=IO
PORTiic_eeprom_onboard_sda_pin=iic_eeprom_onboard_sda_pin,DIR=IO
#SwitchesonCM-MMCXforclocksrcselection(okifCM-MMCXisnotinstalled)
PORTcm_mmcx_sw=cm_mmcx_sw,DIR=I,VEC=[0:
1]
#80MHzsamplingclockfromAD9512
PORTsamp_clk_p_pin=ad_refclk_in,DIR=I,DIFFERENTIAL_POLARITY=P,SIGIS=CLK,CLK_FREQ=80000000
PORTsamp_clk_n_pin=ad_refclk_in,DIR=I,DIFFERENTIAL_POLARITY=N,SIGIS=CLK,CLK_FREQ=80000000
#200MHzLVDSoscillatorinput
PORTosc200_p_pin=osc200_in,DIR=I,DIFFERENTIAL_POLARITY=P,SIGIS=CLK,CLK_FREQ=200000000
PORTosc200_n_pin=osc200_in,DIR=I,DIFFERENTIAL_POLARITY=N,SIGIS=CLK,CLK_FREQ=200000000
#AD9963ADC/DACcontrolpins(RFA&
RFB)
PORTRFA_AD_spi_cs_n_pin=RFA_AD_spi_cs_n,DIR=O
PORTRFA_AD_spi_sdio=RFA_AD_spi_sdio,DIR=IO
PORTRFA_AD_spi_sclk_pin=RFA_AD_spi_sclk,DIR=O
PORTRFA_AD_reset_n_pin=RFA_AD_reset_n,DIR=O
PORTRFB_AD_spi_cs_n_pin=RFB_AD_spi_cs_n,DIR=O
PORTRFB_AD_spi_sdio=RFB_AD_spi_sdio,DIR=IO
PORTRFB_AD_spi_sclk_pin=RFB_AD_spi_sclk,DIR=O
PORTRFB_AD_reset_n_pin=RFB_AD_reset_n,DIR=O
#RFAADpins
PORTRFA_AD_TRXD=rfa_trxd,DIR=I,VEC=[11:
PORTRFA_AD_TRXCLK=rfa_trxclk,DIR=I
PORTRFA_AD_TRXIQ=rfa_trxiq,DIR=I
PORTRFA_AD_TXD=rfa_txd,DIR=O,VEC=[11:
PORTRFA_AD_TXIQ=rfa_txiq,DIR=O
PORTRFA_AD_TXCLK=rfa_txclk,DIR=O
#RFBADpins
PORTRFB_AD_TRXD=rfb_trxd,DIR=I,VEC=[11:
PORTRFB_AD_TRXCLK=rfb_trxclk,DIR=I
PORTRFB_AD_TRXIQ=rfb_trxiq,DIR=I
PORTRFB_AD_TXD=rfb_txd,DIR=O,VEC=[11:
PORTRFB_AD_TXIQ=rfb_txiq,DIR=O
PORTRFB_AD_TXCLK=rfb_txclk,DIR=O
#RSSIADCpins
PORTRFA_RSSI_D=RFA_RSSI_D,DIR=I,VEC=[9:
PORTRFB_RSSI_D=RFB_RSSI_D,DIR=I,VEC=[9:
PORTRF_RSSI_CLK=wlan_rssi_clk,DIR=O
PORTRF_RSSI_PD=net_gnd,DIR=O
#RFAtransceiverandfront-end
PORTRFA_TxEn_pin=RFA_TxEn,DIR=O
PORTRFA_RxEn_pin=RFA_RxEn,DIR=O
PORTRFA_RxHP_pin=RFA_RxHP,DIR=O
PORTRFA_SHDN_pin=RFA_SHDN,DIR=O
PORTRFA_SPI_SCLK_pin=RFA_SPI_SCLK,DIR=O
PORTRFA_SPI_MOSI_pin=RFA_SPI_MOSI,DIR=O
PORTRFA_SPI_CSn_pin=RFA_SPI_CSn,DIR=O
PORTRFA_B_pin=RFA_B,DIR=O,VEC=[0:
6]
PORTRFA_LD_pin=RFA_LD,DIR=I
PORTRFA_PAEn_24_pin=RFA_PAEn_24,DIR=O
PORTRFA_PAEn_5_pin=RFA_PAEn_5,DIR=O
PORTRFA_AntSw_pin=RFA_AntSw,DIR=O,VEC=[0:
#RFBtransceiverandfront-end
PORTRFB_TxEn_pin=RFB_TxEn,DIR=O
PORTRFB_RxEn_pin=RFB_RxEn,DIR=O
PORTRFB_RxHP_pin=RFB_RxHP,DIR=O
PORTRFB_SHDN_pin=RFB_SHDN,DIR=O
PORTRFB_SPI_SCLK_pin=RFB_SPI_SCLK,DIR=O
PORTRFB_SPI_MOSI_pin=RFB_SPI_MOSI,DIR=O
PORTRFB_SPI_CSn_pin=RFB_SPI_CSn,DIR=O
PORTRFB_B_pin=RFB_B,DIR=O,VEC=[0:
PORTRFB_LD_pin=RFB_LD,DIR=I
PORTRFB_PAEn_24_pin=RFB_PAEn_24,DIR=O
PORTRFB_PAEn_5_pin=RFB_PAEn_5,DIR=O
PORTRFB_AntSw_pin=RFB_AntSw,DIR=O,VEC=[0:
#DDR3SODIMM
PORTddr3_sodimm_ck_p=ddr3_sodimm_ck_p,DIR=O,SIGIS=CLK,VEC=[1:
PORTddr3_sodimm_ck_n=ddr3_sodimm_ck_n,DIR=O,SIGIS=CLK,VEC=[1:
PORTddr3_sodimm_cke=ddr3_sodimm_cke,DIR=O
PORTddr3_sodimm_cs_n=ddr3_sodimm_cs_n,DIR=O
PORTddr3_sodimm_odt=ddr3_sodimm_odt,DIR=O
PORTddr3_sodimm_ras_n=ddr3_sodimm_ras_n,DIR=O
PORTddr3_sodimm_cas_n=ddr3_sodimm_cas_n,DIR=O
PORTddr3_sodimm_we_n=ddr3_sodimm_we_n,DIR=O
PORTddr3_sodimm_ba=ddr3_sodimm_ba,DIR=O,VEC=[2:
PORTddr3_sodimm_addr=ddr3_sodimm_addr,DIR=O,VEC=[14:
PORTddr3_sodimm_dq=ddr3_sodimm_dq,DIR=IO,VEC=[63:
PORTddr3_sodimm_dm=ddr3_sodimm_dm,DIR=O,VEC=[7:
PORTddr3_sodimm_reset_n=ddr3_sodimm_reset_n,DIR=O
PORTddr3_sodimm_dqs_p=ddr3_sodimm_dqs_p,DIR=IO,VEC=[7:
PORTddr3_sodimm_dqs_n=ddr3_sodimm_dqs_n,DIR=IO,VEC=[7:
#Debugpins
PORTdebughdr=dbg_gpio_b2&
dbg_gpio_b1&
dbg_gpio_b0&
mac_nav_active&
mac_backoff_active&
mac_idle_for_difs&
dbg_mpdu_tx_pending&
dbg_rssi_det&
mac_phy_rx_fcs_good_ind&
dbg_lts_timeout&
dbg_pkt_det_dsss&
dbg_pkt_det_ofdm&
dbg_dsss_rx_active&
dbg_ofdm_rx_active&
dbg_tx_running,DIR=O,VEC=[14:
PORTwlan_phy_rx_pkt_det_in_pin=net_wlan_phy_rx_pkt_det_in_pin,DIR=I
BEGINwlan_phy_tx_pmd_axiw
PARAMETERINSTANCE=wlan_phy_tx
PARAMETERHW_VER=2.01.c
PARAMETERC_INTERCONNECT_S_AXI_AW_REGISTER=7
PARAMETERC_INTERCONNECT_S_AXI_AR_REGISTER=7
PARAMETERC_INTERCONNECT_S_AXI_W_REGISTER=7
PARAMETERC_INTERCONNECT_S_AXI_R_REGISTER=7
PARAMETERC_INTERCONNECT_S_AXI_B_REGISTER=7
PARAMETERC_BASEADDR=0x78e00000
PARAMETERC_HIGHADDR=0x78e0ffff
BUS_INTERFACEPORTB=WLAN_TX_PKT_BUF_PORTB
BUS_INTERFACES_AXI=mb_low_axi_periph
PORTaxi_aclk=clk_160MHz
PORTsysgen_clk=clk_160MHz
PORTdac_tx_clk=clk_20MHz
PORTrfa_dac_i=RFA_TX_I
PORTrfa_dac_q=RFA_TX_Q
PORTrfb_dac_i=RFB_TX_I
PORTrfb_dac_q=RFB_TX_Q
PORTrx_sigs_invalid=rx_sigs_invalid
#RC->
PHYstart
PORTRC_PHY_START=tx_phy_start
#PHY->
RCstatectrl
PORTrc_usr_rxen=rc_usr_rxen
PORTrc_usr_txen_a=phy_rc_txen_a
PORTrc_usr_txen_b=phy_rc_txen_b
PORTrc_tx_gain_a=phy_rc_tx_gain_a
PORTrc_tx_gain_b=phy_rc_tx_gain_b
#MAC<
->
TxPHYports
PORTphy_tx_gain_a=mac_phy_tx_gain_a
PORTphy_tx_gain_b=mac_phy_tx_gain_b
PORTphy_tx_pkt_buf=mac_phy_tx_pkt_buf
PORTphy_tx_start=mac_phy_tx_start
PORTphy_tx_done=mac_phy_tx_done
PORTphy_tx_started=mac_phy_tx_started
PORTphy_tx_ant_mask=mac_phy_tx_ant_mask
PORTmac_timestamp_lsb=mac_tx_start_timestamp_lsb
PORTmac_timestamp_msb=mac_tx_start_timestamp_msb
#Debugports
PORTdbg_tx_running=dbg_tx_running
END
BEGINwlan_phy_rx_pmd_axiw
PARAMETERINSTANCE=wlan_phy_rx
PARAMETERHW_VER=2.04.i
PARAMETERC_BASEADDR=0x78e20000
PARAMETERC_HIGHADDR=0x78e2ffff
BUS_INTERFACEPORTB=WLAN_RX_PKT_BUF_PORTB
PORTpkt_det_in=net_wlan_phy_rx_pkt_det_in_pin
PORTadc_rx_clk=agc_iq_valid_out
PORTrfa_rx_i=agc_rfa_i
PORTrfa_rx_q=agc_rfa_q
PORTrfa_rssi=RFA_RSSI_D
PORTrfb_rx_i=agc_rfb_i
PORTrfb_rx_q=agc_rfb_q
PORTrfb_rssi=RFB_RSSI_D
PORTrssi_adc_clk=wlan_rssi_clk
PORTpkt_det_o=phy_rx_pkt_det
PORTrfa_g_rf=agc_rfa_g_rf
PORTrfa_g_bb=agc_rfa_g_bb
PORTrfb_g_rf=agc_rfb_g_rf
PORTrf