数字秒表全部程序.vhdlWord文档下载推荐.docx

数字秒表全部程序.vhdlWord文档下载推荐.docx

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sel:

outstd_logic_vector（2downto0））;

endmb_top;

architectureaofmb_topis

componentdiv

port（clr,clk:

instd_logic;

q:

bufferstd_logic）;

endcomponent;

componentcount10

port（

clr,start,clk:

cout:

daout:

bufferstd_logic_vector（3downto0））;

componentcount6

componentseltime

clr,clk:

dain1:

instd_logic_vector（3downto0）;

dain2:

dain3:

dain4:

dain5:

dain6:

sel:

outstd_logic_vector（2downto0）;

outstd_logic_vector（3downto0））;

componentdeled

num:

led:

outstd_logic_vector（6downto0））;

componentalarm

clk,i:

q:

outstd_logic）;

signaldiv_q,b_cout,s_cout,m_cout,sm_cout,f_cout,sf_cout:

std_logic;

signalb_daout,s_daout,m_daout,sm_daout,f_daout,sf_daout,seltime_daout:

std_logic_vector（3downto0）;

signalledout:

std_logic_vector（6downto0）;

begin

a<

=ledout（0）;

b<

=ledout

（1）;

c<

=ledout

（2）;

d<

=ledout（3）;

e<

=ledout（4）;

f<

=ledout（5）;

g<

=ledout（6）;

u1:

divportmap（stop,clk,div_q）;

u2:

count10portmap（stop,start,div_q,b_cout,b_daout）;

u3:

count10portmap（stop,start,b_cout,s_cout,s_daout）;

u4:

count10portmap（stop,start,s_cout,m_cout,m_daout）;

u5:

count6portmap（stop,start,m_cout,sm_cout,sm_daout）;

u6:

count10portmap（stop,start,sm_cout,f_cout,f_daout）;

u7:

count6portmap（stop,start,f_cout,sf_cout,sf_daout）;

u8:

seltimeportmap（stop,div_q,b_daout,s_daout,m_daout,sm_daout,f_daout,sf_daout,sel,seltime_daout）;

u9:

deledportmap（seltime_daout,ledout）;

u10:

alarmportmap（div_q,sf_cout,speaker）;

enda;

分频器（5MHz的时钟脉冲）

entitydivis

enddiv;

architectureaofdivis

signalcount:

integerrange0to49999;

process（clr,clk）

if（clk'

eventandclk='

1'

）then

ifclr='

then

count<

=0;

elsifcount=49999then

q<

=notq;

else

=count+1;

endif;

endprocess;

end;

十进制计数器模块

useieee.std_logic_unsigned.all;

useieee.std_logic_arith.all;

entitycount10is

clr,start,clk:

cout:

daout:

endcount10;

architecturebehaveofcount10is

process（clr,start,clk）

thendaout<

="

0000"

;

elsif（clk'

ifstart='

ifdaout="

1001"

cout<

='

elsedaout<

=daout+1;

0'

endif;

endif;

endbehave;

六进制计数器模块

entitycount6is

endcount6;

architecturebehaveofcount6is

elsif（clk'

ifstart='

ifdaout="

0101"

elsedaout<

endif;

选择模块

entityseltimeis

endseltime;

architecturebehaveofseltimeis

std_logic_vector（2downto0）;

sel<

=count;

begin

ifclr='

count<

000"

elsif（clk'

ifcount="

110"

thencount<

elsecount<

endif;

casecountis

when"

001"

=>

daout<

=dain1;

010"

=dain2;

011"

=dain3;

100"

=dain4;

101"

=dain5;

=dain6;

whenothers=>

null;

endcase;

数码管显示模块

entitydeledis

port（num:

enddeled;

architecturebehaveofdeledis

process（num）

--abcdefg

casenumis

led<

"

0001"

0010"

0011"

when"

0100"

0110"

0111"

1000"

Alarm模块

entityalarmis

port（clk,i:

endalarm;

architecturebehaveofalarmis

integerrange0to20;

signalq0:

process（clk,i）

if（clk'

ifi='

q0<

elsifi='

ifcount<

=19thencount<

=notq0;

q<

=q0;

框架三层，局部为二层钢构。

本工程外脚手架采用落地式钢管脚手架,外架随主体结构上升，同步搭设，比操作面高出一步，确保主体及外装修的正常安全施工。