Cadence tutorialWord文件下载.docx

Cadence tutorialWord文件下载.docx

《Cadence tutorialWord文件下载.docx》由会员分享，可在线阅读，更多相关《Cadence tutorialWord文件下载.docx（29页珍藏版）》请在冰点文库上搜索。

1.2DesignKitContents

IntheinstalledPDKdirectory,therearefollowingcontents,shownasfigure1:

（1）DesignRule

（2）SpiceModel

（3）Skill

（4）CellView

（5）CDSlibFile

（6）TechnologyFile

（7）DisplayFile

（8）VerificationRuleFile:

calibreDRC/LVS/RCX

（9）Documentforintroduction

Figure1.1PDKcontents

1.3InstallationofPDK

TheoldCadenceDataBase（CDB）versionswillnolongerworkwiththenewCadence,sotheoldlibrariesneedtobeconvertintothenewOpenAccessdatabase.Fortunately,Cadencehasprovidedaconverter,cdb2oa,thatcandoagoodjobofconvertingthedata.ThistoolispartofthenewICv6tools.

TousethistoolandinstallthePDK,doasfollowing:

Step1:

createadirectorytoconvert,herenamedOA_conversion.

Step2:

intheOA_conversion,createadirectorytoputthecds.libfile,herenamedcdb,shownasfigure1.2.

Figure1.2ConversionDirectory

Step3:

copythecds.libinthelibraryintodirectorycdb.AndopenitwithTXT,rewriteitasfollowing,shownasfigure1.3.Saveitandclose.

Figure1.3rewritecds.lib

Step4:

inthedirectoryofOA_conversion,starticfb&

shownasfigure1.4.closeWhat’sNewin6.1.0,andyoucanseetheVirtuosowindowasfigure1.5.

Figure1.4starticfb&

interminalofOA_conversion

Figure1.5Virtuosowindow

Step5:

openConversionToolBoxbyclickTools>

>

ConversionToolBox…,thenthewindowshownasfigure1.6.

Figure1.6ConversionToolBox

Step6:

chooseCDBtoOpenAccessTranslator…,thensetthepathofcds.llibfile,thenthewindowshownasfigure1.7.

Figure1.7CBDtoOpenAccessTranslator

Setp7:

clickok.Afteritfinishtheconversion.Closeicfb.InthedirectoryofOA_conversion,afoldernamedtsmcrf18appear,itcontentstheCellViewinformationthathasbeenconverted,andsomelogfilesaregenerated,too,asshowninfigure1.8.

Figure1.8OA_conversionafterconvert

Step8:

inthedirectoryoflibrary（hereis/home/eda/IC610/1P6M_1.8V_3.3V_MM_RF）,deletetheoldCellViewfolder（alsonamedtsmc18rf）.Thencopytheconvertedtsmc18rf（inthedirectory/home/eda/IC610/OA_conversion）tothelibrarydirectory（hereis/home/eda/IC610/1P6M_1.8V_3.3V_MM_RF）

Step9:

starticfb&

inworkdirectory（hereis/home/eda/IC610）,clickTools>

LibraryManagertoopenLibraryManagerwindow,shownasfigure1.9.

Figure1.9LibraryManagerWindow

Step10:

intheLibraryManager,clickFile>

New>

Library…then,findthelibrary’sdirectory,andthewindowshownasfigure1.10.

Figure1.10NewLibraryWindow

Step11:

clickOK,thenawindowcalledTechnologyFileforNewLibraryappears,shownasfigure1.11.Here,wechooseCompileanASCIItechnologyfile,thenthewindowappearasfigure1.12,choosethetechfile.tfinthelibrary’sdirectory,clickOK.Thentsmc18rfalongwithitsCellViewsappearinLibraryManager,asshowninfigure1.13.

Figure1.11TechnologyFileforNewLibrary

Figure1.12LoadTechnologyFile

Figure1.13LibraryManagerafterinstallTSMC0.18PDK

1.4DesignMethodologyofTwo-StageOpAmps

Figure1.14showsablockdiagramthatrepresentstheimportantaspectsofanopamp.CMOSopampsareverysimilarinarchitecturetotheirbipolarcounterparts.Thedifferential-transconductancestageformstheinputoftheopampandsometimesprovidedthedifferentialtosingle-endedconversion.Normally,agoodportionoftheoverallgainisprovidedbythedifferential-inputstage,whichimprovesnoiseandoffsetperformance.Thesecondstageistypicallyaninverter.Ifthedifferential-inputstagedoesnotperformthedifferential-to-single-endedconversion,thenitisaccomplishedinthesecond-stageinverter.Iftheopampmustdrivealow-resistanceload,thesecondstagemustbefollowedbyabufferstagewhoseobjectiveistolowertheoutputresistanceandmaintainalargesignalswing.Biascircuitsareprovidedtoestablishtheproperoperatingpointforeachtransistorinitsquiescentstate.Andcompensationisusedtoachievestableclosed-loopperformance.

Figure1.14Blockdiagramofageneraltwo-stageopamp

Chapter2Front-endDesign

Beforestartingdesignopamps,aworkdirectoryneedtobecreated.Doasfollowingtocreate:

LibraryManagertoopenLibraryManagerwindow.

Library…,entertheDesignLibrary’snameyouwant（herenamedmydesign_base_tsmc）,andputittothedirectoryyouwanttoput（herechoose/home/eda/livia）,asshowninfigure2.1.

Figure2.1createdesignlibrary

clickOK.ThenawindowcalledTechnologyFileforNewLibraryappears,shownasfigure2.2.Here,wechooseAttachtoanexistingtechnologylibrary.Thenthewindowappearasfigure2.3,choosethetsmc18rfinTechnologyLibrary,clickOK.Thendesignlibrarymydesign_base_tsmcappearsinLibraryManager,asshowninfigure2.4.

Figure2.2TechnologyFileforNewLibrary

Figure2.2AttachLibrarytoTechnologyLibrary

Figure2.4DesignLibrarycreatingfinished

2.1DesignofHighGainstage

Inthistutorial,highgainstageisaCurrent-SourceLoadInverter.Thiskindofinverterstructureisacommon-gateconfigurationusingap-channeltransistorwiththegateconnectedtoadcbiasvoltage.

2.1.1SchematicCellView

ACurrent-SourceLoadInverterschematiccellviewwillbecreatedinthissection.

inLibraryManager,chooseworklibrarymydesign_base_tsmc,thenclickonFile>

CellView,fillintheNewFileformwiththefollowingasfollows（orfigure2.5）andclickOK.

Figure2.5NewFile

TheSchematicEditorwindowwillpopupautomaticallywhenthenewschematiccellviewiscreated,asshowninfigure2.6.

Figure2.6SchematicEditor

clickCreate>

Instanceorusethehotkey‘i’,AddInstancewindowwillpopup.Browse‘pmos3v’symbolwhichbelongstolibrary‘tsmc18rf’>

Cell‘pmos3v’>

View‘symbol’,asshowninfigure2.7.PutthissymbolintotheSchematicEditor.Dothesamesteptoadda‘nmos3v’.Figure2.8showtheschematicview.

Figure2.7AddInstance

Figure2.8Addmostransistors

Pinorusethehotkey‘p’,‘VIN’isInputpin,‘VOUT’isOutputpin,‘VDD’and‘GND’areInOutpins,theschematicviewisshowninfugure2.9.

Figure2.9AddPins

Wireorusethehotkey‘w’,theschematicviewisshowninfugure2.10.Thepropertyofeachcomponentcanbeseenorchangebyselectingthecomponentandusethehotkey‘q’.

Figure2.10Current-SourceLoadInverterschematic

Uptonow,wehavecompletedaschematicdesignofaCurrent-SourceLoadinverter.ClickFile>

CheckandSavetosavethisdesign.

2.1.2SchematicSimulation

Beforesimulatethecircuit,weneedbuildatoplevelcellandcreatetestschematicforit.

createasymbolviewof‘op_amp_stage2’.ClickCreate>

Cellview>

FromCellview,thenthe‘CellviewFromCellview’windowwillpopupautomatically,asshowninfigure2.11.Afterclickok,thesymbolviewwillbecreated,asshowninfugure2.12.

Figure2.11CellviewFromCellview

Figure2.12SymbolViewofCurrent-SourceLoadInverter（op_amp_stage2）

Thedefaultshapeofasymbolisrectangle.DesignercanchangethestyletothetraditionalcircuitsymbolofinverterbyusingsomecommandsofSymbolEditor,suchasCreate>

Shape>

Polygon,Create>

Circle,etc.Thischangeisnotnecessary.

createatestschematic.Createanewschematiccellcalled‘op_amp_stage2_test’.Thedetailschematicisshowninfigure2.13,andthepropertyofeachcomponentis:

V0：

3.3V（vdc）

V1：

1.15V（dc）500uV（amplitude）1M（frequcy）

V2：

1.95V（vdc）

C0:

15pF

Figure2.13SchematicViewofop_amp_atage2_test

First,thequiescentoperatingpointshouldbepointed.Fromeachtransistor’ssaturationrelationship,heresetBIASvoltageto1.95V.TomakeM1workatsaturatestate,changeV1’svaluetomakeaDCsimulating.

tomakecheckingsimulateresultconvenient,shouldnamesomespecialnets.ClickCreate>

WireNameorusethehotkey‘l’,then‘AddWireName’windowpopupautomatically,asshowedinfigure2.14,thenclickonrelevantwireoftestschematic.Here,addtwoname’vin’and‘vout’totwonetsrespectively.

Figure2.14AddWireName

clickLaunch>

ADEL,then’AnalogDesignEnvironment’deckwillpopupautomatically,asshowedinfigure2.15.

Figure2.15AnalogDesignEnvironment

clickAnalyses>

choose,thenthe‘ChoosingAnalyses’willpopupautomatically,choosedc,andinthe‘SweepVariable’choose‘ComponentParameter’.Click‘SelectComponent’,thenselectV1ontestcircuitschematic,the‘SelectComponentParameter’formwillpopup,asshowedinfigure2.16,andchoose‘dc’,thefirstline,thenclickOKtoclose‘SelectComponentParameter’form.Andin‘ChoosingAnalyses’window,in‘SweepRange’,