毕业英文翻译.docx

毕业英文翻译.docx

《毕业英文翻译.docx》由会员分享，可在线阅读，更多相关《毕业英文翻译.docx（8页珍藏版）》请在冰点文库上搜索。

毕业英文翻译

AnalternativemethodofprecisefrequencybytheaidofaDDS

Contents

AmethodoffrequencymeasurementbasedonaclosedloopcomposedmainlyofaFrequencyComparator（FC）andaDirectDigitalSynthesizer（DDS）ispresentedinthispaper.TheDDSservesasreferencesinewavesignalgeneratoractingatoneoftheFC'sinputs.TheFCacceptsthehard-limitedwaveformoftheDDSaswellastheunknownfrequency.Fromthecomparisonofthetwosignalsalogicoutputthatcontrolsanup/downcounterisproduced.Thecounter'soutputactingastheFrequencySettingWord（FSW）instructstheDDStoproduceanewsinewavecloserinfrequencytotheunknownone.Whentheloopsettles,theFSWgivesthedigitalestimateoftheunknownfrequency.AdvantageistakenfromtheinherenthighresolutionoftheDDSandnoiseimmunityoftheloop,todesignanequallypreciseandimmunefrequencymeter.Alltheadditionalassociatedstagesuptotheinstrument'sdisplayarepresented.

1Introduction

Themostcommonlyusedfrequencymeasurementtechniqueadoptscountersthatcountthepulsesoftheunknownfrequencyduringapredefinedtimewindow（aperture）.Apartfromthis,techniqueswherethepulsesofareferencefrequencyarecountedduringoneormoreperiodsoftheunknownonearealsocommon.Inthelattercase,theperiodinsteadofthefrequencyisestimated.Somepapersin[1]intheliteraturedealwiththeproblemoflowfrequencymeasurementandarefocusinginthefrequencyrangeofcardiac（heart）signals（afewhertz）orinthemainsfrequency（50-60Hz）.Thesetechniquesareactuallymeasuringtheperiodofthesignalsandusesomewaytocalculateitsreciprocal,thefrequency.In[2],thefrequencyiscalculatedbythemethodoflook-uptables.Others[4-6]aremicroprocessorormicrocontrollerbased.

Theabovemethodscanbecharacterizedasopen-loopmethodsi.e.digitalcountersareusedtocountduringapredefinedtinleintervalandcalculatetheresultafterwards.Itsclosed-loopformcharacterizestheproposedmethodinthispaper.Bytheterm"closed-loop"wedenotesomesortoffeedback.Awaveformwithaknown（controlled）frequencyisproducedwithinthecircuitandisfedbacktothefrequencycomparisonstagewhichconsecutivelyforcesittoapproximatetheunknown（input）frequency.ThedevicethatproducestheabovementionedwaveformofcontrolledfrequencyisaDirectDigitalSynthesizer.

2DirectDigitalSynthesis

AtypicalDirectDigitalSynthesizerconsistsofaRAMcontainingsamplesofasinewave（sinelook-uptable,LUT）.ThesesamplesaresweptinacontrolledmannerbytheaidofaFrequencySettingWord（FSW）,whichdeterminesthephasestep.AtypicalFSWis32-bitwide,but48-bitsynthesizersleadinginhigherfrequencyresolutionarealsoavailable.Aphaseaccumulatorproducesthesuccessiveaddressesofthesinelook-uptableandgeneratesadigitizedsinewaveoutput.ThedigitalpartoftheDDS,thephaseaccumulatorandtheLUT,iscalledNumericallyControlledOscillator（NCO）.Thefinalstage,whichincontrasttothepreviousoneismostlyanalog,consistsofaD/Aconverterfollowedbyafilter.Thefiltersmoothesthedigitizedsinewave,producingacontinuousoutputsignal.Intheapplicationswhereasquarewaveoutputisneeded,thisisobtainedbyahardlimiterafterthefilter.Itisnotequivalenttousee.g.theMSBoftheaccumulator'soutputinsteadofthefilteredandhardlimitedwaveformbecausesignificantjitterwillbeencountered.

Thefrequencyoftheoutputsignalforann-bitsystemiscalculatedinthefollowingway;Ifthephasestepisequaltoone,theaccumulatorwillcountbyones,taking

clockcyclestoaddresstheentireLUTandtogenerateonecycleoftheoutputsinewave.Thisisthelowestfrequencythatthesystemcangenerateandisalsoitsfrequencyresolution.SettingtheFSWequaltotwo,resultsintheaccumulatorcountingbytwos,taking

clockcyclestocompleteonecycleoftheoutputsinewave.Itcaneasilybeshownthatforanyintegerm,wherem<

thenumberofclockcyclestakentogenerateonecycleoftheoutputsinewaveis

/m,andtheoutputfrequency（fDDS）andthefrequencyresolution（fres）aregivenbythefollowingformulas：

fDDS=

fres=fclk/

Forn=32andhavingaclockfrequencyoffclk=33MHz,thefrequencyresolutionis7.68mHz.Ifnisincreasedto48,withthesameclockfrequency,aresolutionof120nHzispossible.

3Theproposedfrequencymeasurementtechnique

TheideathatledtoourpresentdesigncamefromtheextremelyhighfrequencyresolutionoftheDDSdevicesandisenforcedbythenoiseimmunityofitsclosedloopform.A（known）frequencysource,theDDS,isemployedinaclosedloopandisforcedprogressivelytoproduceanoutputwithafrequencyequaltotheunknowninput.AruleofthumbintheDDSsystemsisthatthemaximumacceptablesynthesizedfrequencyisabout25%oftheclockfrequency（wellbelowtheNyquistlimit）.Accordingtothis,ourprototypethatusesa33MHzclockwouldeffectivelycountupto8MHz.LookingattheGaAsproducts,wecanseethatrecentlyavailableDDSdevisescanoperateatclockfrequenciesuptotheextentof400MHz.Therefore,bythepresentmethod,frequencycountersworkingupto100MHzcanbedesigned.TheresolutionwilldependonthenumberofFSWbitsandtheclockfrequency.TheclockfrequencyfclkoftheDDSisverycriticalbecauseasitdecreases,theresolutionoftheproposedmethod（definedasfclk/

）becomesfineri.e.itimproves.Theimpactoftheclockfrequencydecreaseisthesubsequentdecreaseofitsmaximumoutputfrequencythatlimitsthecounter'smaximumcount.Themajorblockshavebeenshown.AmongthemaretheFrequencyComparatorandtheDDS.Toovercomesomedisadvantagesofthespecificfrequencycomparatoracorrectionstagehasbeenincorporated.Thisstageisalsousedforthemeasurementextractioninordertodisplaythecorrectreading.

3.1Operationofthecircuit

ThecircuitoperatesinsuchawaythatatthebeginningofanewmeasurementtheDDSoutputfrequencywouldbecontrolledinasuccessiveapproximationway.TheinitialDDSfrequencywouldbehalfofit'smaximum.Inaddition,thefrequencystepoftheapproximationwouldequalthe1/4oftheDDSmaximumfrequency.OneveryapproximationthefrequencystepisdividedbytwoandaddedorsubtractedtotheFSWoftheDDS,dependingontheoutputoftheFrequencyComparator.Theapproximationprocedurestopswhenthestepsizedecreasestoone.Afterthat,anup/downcountersubstitutestheapproximationmechanism.

ThedigitalFSW,aftertheappropriatecorrectionanddecoding,ispresentedinanoutputdevicei.e.anLCDdisplayoranyothersuitablemeans.Alternatively,itcanbedigitallyrecordedoritcanbereadbyacomputer.

AsconclusionofthisinitialapproachwecouldsaythattheproposedmethodisbasedonaDigitalControlledSynthesizerwhichisforcedtoproduceafrequencyalmostequaltotheunknownone.

3.2Frequencycomparison

Thefrequencycomparatorseemstobethemostcriticalstageofthedesign.Theimplementationisbasedonamodifiedphase/frequencycomparatorproposedbyPhilipsinthe74HC4046PLLdevice.Itconsistsprimarilyoftwobinarycounters,countinguptotwoandanRSflip-flop.

Thefunctionofthefrequencycomparatorisbasedontheprinciplethatthelowerfrequency,i.e.largerperiod,includes（embraces）atleastoneormorefullperiodsofthehigherfrequency（smallerperiod）.Thismeansthattwoormorerisingedgesofthehigherfrequencywaveformareincludedwithinthelowerfrequencyperiod.Consideringtheabove,thecircuitoperatesasfollows:

Whenthefirstcounter（#1）encounterstworisingedgesoftheunknownfrequencyinoneperiodoftheDDS,itsetstheoutputoftheRSflip-flop.Thelogic"1"oftheRSflip-flopactingattheU/DcontrolinputoftheUp/DowncounterforcestheDDStoriseitsoutputfrequency.Onthecontrary,whenthesecondcounter（#2）countstworisingedgesoftheDDSoutputwithinaperiodoftheunknownfrequencyitresetstheRSflip-flop'soutput.ThisactiondecreasesthefrequencyoftheDDS.

Atafirstglanceonecouldthinkthatthesynthesizedfrequencycouldreachthemeasuredone（fin）andthentheoperationofthecounterstops.Unfortunatelythisisnotthecase.Adynamicmechanismtakesplaceinstead.Thecircuitneedssometimetorealizethecorrectfrequencyrelation.Wewillrefertothistimeas"hysteresis".HysteresisdependsontheinitialtimingrelationoftheDDSoutputandontheunknownfrequency.Initially,duringthehysteresisperiod,theindicationregardingthelargerfrequencyisambiguousi.e.itcanbeerroneous.Theambiguitysettleswhentworisingedgesofthehigherfrequencywaveformoccurduringoneperiodofthelowerone.IfweconsiderthecaseoftheDDSfrequencytobeequaltotheunknownone,wewillfindthatthecomparator'soutputwilltoggle,indicatingalternativelythattheDDSfrequencyishigherorlowerthantheunknown.Thisisactuallyanacceptableandexpectedcondition,because（asinavoltagecomparator）anequalityindicationcouldnotexist.Inourcasethisisnotaproblembecausethecircuitisembeddedinaclosedloop.Theloopwillactinamannerthataftersomeshorttime,thehysteresis,thesituationwillbereversedandsoon.Thedurationofhysteresisisvariable.Thissituationiscontrolled,aswillbeexplainedlater.Althoughananalogimplementationofthefrequencycomparatorwouldlookmorerobusttonoiseweinsistedtothedigitalimplementationforthreereasons:

easeofimplementationinVLSIorProgrammableLogicDevices（PLDs）withnoneedofanalogcomponents,widefrequencyrangeofoperationandshorterresponsetime.