计算机体系结构试题及答案Computer architecture questions and answers.docx

计算机体系结构试题及答案Computer architecture questions and answers.docx

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计算机体系结构试题及答案Computerarchitecturequestionsandanswers

计算机体系结构试题及答案（Computerarchitecturequestionsandanswers）

Questionsandanswersofcomputerarchitecture

1,benefitingfromthedevelopmentofhighperformancecomputer:

（1）thedevelopmentofcircuittechnology;

（2）thedevelopmentofcomputerarchitecturetechnology.

2,structure:

computersystemscanbeclassifiedbyfunctionoflanguageasamultilevelstructure,eachlayerindifferentlanguagefeatures.Sixth:

theapplicationofvirtualmachinelanguage->fifth:

high-levellanguagevirtualmachineassemblylanguage->Fourth:

->Third:

virtualmachineoperatingsystemvirtualmachine-levelsecond:

machinelanguage（traditionalmachinelevel）->Level1:

micromachinelevelprogram.

3,computerarchitecture:

seecomputerprogrammerattribute,namelythegeneralstructureandfunctionalproperties.

4,transparency:

incomputertechnology,thethingsorpropertiesalreadyexists,theconceptfromapointofviewandhavecalledtransparency.

5,theproposedarchitectureAmdahlattributereferstothecomputermachinelanguagelevelprogrammerssee.

Theessenceof36,aclassiccomputerarchitectureconceptistodeterminethecomputersystemhardwareandsoftwareinterface,whichistheinstructionsetdesign,abovetheinterfacebysoftwarefunctionrealization,interfacebyhardwareandfirmwarefunctionstoachieve.

7,computerorganizationisthelogicofthecomputersystem;computerisaphysicalcomputersystemtoachieve.

Thedifferenceandconnectionbetweenthe8,computerarchitecture,computerorganization,computer?

Answer:

asystemstructurecanhaveavarietyofcomponents,acomponentcanhaveavarietyofphysicalimplementation,includingsystemstructureresearchonorganizationandimplementation.

9,aseriesofmachine:

referstoasystemofthesamestructurebutwithdifferentorganizationandimplementationofaseriesofdifferenttypesofmachines.

10,softwarecompatibility:

thesamesoftwarecanberunwithoutchangeonthemachinesystemofthesamestructure,andtheresultstheygetthesame,theonlydifferenceisthedifferentrunningtime.

11,compatiblemachine:

differentmanufacturers,hasthesamecomputerarchitectures.

12,backwardcompatibilityisthebasiccharacteristicsofsoftwarecompatibility,isthefundamentalcharacteristicsofseriesmachine.

13,inthefieldofcomputermarketcanbedividedintothreemajorareas:

servers,desktopsystems,embeddedcomputing.

14,Moore:

integratedcircuitdensityapproximatelydoubledeverytwoyears.

Technologybasedanalysisof15quantitativeperformanceevaluation:

（1）（a）responsetime:

fromthebeginningtotheendofthetimebetweenevents;allthetimespentonthecomputertocompleteatask.（b）:

thecompleteflowinunittimeandworkload.（c）x,yassumedtwocomputers;Xfasterthanymeans:

foragiventask,theresponsetimeofXislessthany.TheperformanceofXisseveraltimestheYreferstotheresponsetimeofX/y=nresponsetime,responsetimeandperformanceisinverselyproportionalto.

16,theprobabilityofeventpriorityprinciple:

（basicidea）fortheprobabilityofevents（themostcommonevent）,givingprioritytouseitrightandresourcerights,toobtaintheglobaloptimalresults.

17,AmdahlLaw:

acceleratetheexecutionspeedofacomponentsystemperformanceobtainedspeedup,theimportanceislimitedbythecomponentsinthesystemof.Systemaccelerationratio=totalexecutiontime（improved）/totalexecutiontime（improved）=......

18,Amdahllawcorollary:

ifonlyforapartofthecomputerintheperformanceimprovementismoreimproved,theeffectofthesystem.Ifonlyapartofthewholetaskisoptimized,somuchtheaccelerationratioisnotgreaterthan1/（1-improvementratio）.

19,theperformanceofCPU:

Cputime=totalnumberofclockcycles/clockfrequencyCpi=totalnumberofclockcycles（IC/CPI:

thenumberofclockcyclesperinstruction;theaverageICimplementationprocess:

thenumberofinstructions.）

TheperformanceofCpuformula:

totalCPUtime=CPI*IC/CPIclockfrequencywhichreflectsthecomputerarchitectureandcomputertechnology,computerinstructionset;Icreflectsthestructureandtechnologyofcomputerprogramminginstructionset;clockfrequency:

reflecttheimplementationofcomputertechnology,productiontechnologyandcomputerorganization.

20,parallelismreferstoatthesametimeortwoormorethantwokindsofpropertiesofthesameordifferentworkinthesametimeinterval.

Thesecondchapter

1,accordingtotheCPUinternalstorageunittypeofinstructionsetarchitectureforclassification,canbedividedintothestackbasedinstructionsetarchitecture,instructionsetarchitectureandaccumulatortypegeneralregistertypeinstructionsetarchitecture.

2,generalregistertypeinstructionsetmachineisfurthersubdividedinto3types:

Registertoregistertype（R-R）,registermemorytype（R-M）,amemoryregister.

3,addressing:

（1）registeraddressing:

example:

ADDR4R3,meaningRegs[R4]<-Regs[R4]+Regs[R3]

（2）immediatevalues:

example:

ADDR4,addressing3meanings:

Regs[R4]<-Regs[R4]+3

（3）:

offsetcases:

ADDR4,100（R1）meaning:

Regs[R4]+Mem[100+Regs[R1]]

（4）registerindirectaddressing:

example:

ADDR4（R1）meaning:

Regs[R4]<-Regs[R4]+Mem[Regs[R1]]

（5）indexaddressing:

example:

ADDR3（R1+R2）meaning:

Regs[R3]<-Regs[R3]+Mem[Regs[R1]+Regs[R2]]

（6）directaddressingorabsoluteaddressing:

forexample:

ADDR1,（1001）:

Regs[R1]<-Regs[R1]+Mem[1001]meaning

（7）memoryindirectaddressing:

example:

ADDR1,a（R3）meaning:

Regs[R1]<-Regs[R1]+Mem[Mem[Regs[R3]]]

（8）theincrementaddressing:

example:

ADDR1（R2）+meaning:

Regs[R1]<-Regs[R1]+Mem[Regs

（9）decrementaddressing

（10）zoomaddressing

Thefunctionofstructuredesignoftheinstructionset,4:

Theinstructionsetclassificationstructureinoperation

Thetypeofoperationexample

（1）arithmeticandlogicaloperationsonintegerarithmeticandlogicoperations:

addition,subtraction,and,oretc.

（2）datatransmissionLOAD/STORE

（3）controlbranch,jump,procedurecallandreturn,trap

（4）operatingsystemcalls,virtualmemorymanagement.

（5）floatingpointadditionandsubtractionoperation

（6）isconvertedtodecimaldecimaldecimaldecimaladd,multiply,tocharacters

（7）stringstringcomparison,mobile

（8）thepixeloperation,compressionoperation

5,complexinstructionmachine（CISC）:

referstostrengthentheinstructionfunction,realizethefunctionofsoftwaretohardwaredesign,computersystemtorealizetheinstructionsetarchitecturebasedon.

TheshortcomingsoftheCISCinstructionset:

（1）inthecommandsystem,thefrequencyofuseofallkindsofordersisdifferent.

（2）theCISCinstructionsetarchitecturecomplexitybringscomplexityofcomputerarchitecture,whichnotonlyincreasesthedevelopmenttimeandcost,butalsoeasytocausethedesignerror.

（3）theCISCinstructionsetarchitecturecomplexitybringsgreatburdentotheVLSIdesign,isnotconducivetothemonolithicintegration.

（4）intheCISCinstructionsetarchitecture,manycomplexinstructionsrequireverycomplexoperation,soslow.

（5）intheCISCinstructionsetarchitecture,becauseofthedirectivefunctionisnotbalanced,notconducivetotheuseofcomputerarchitecturetechnology（suchasadvancedwatertechnology）toimprovetheperformanceofthesystem.

In1980s6,reducedinstructionsetcomputerdeveloped:

itspurposeistoreducetheinstructionsetofthecomplexityofthestructureasfaraspossible,inordertosimplifytherealizationofthegoalofimprovingperformance,butalsointoday'sinstructionsetisamaintrendofthestructureandfunctionofdesign.

Followthedesignprinciples:

（1）choosetousethehighestfrequencyofinstruction,andaddedsomeofthemostusefulinstructions.

（2）thefunctionofeachinstructionisassimpleaspossible,andcompletedinonemachinecycle.

（3）allhavethesamelengthastheinstruction.

（4）onlytheLOADandSTOREoperatinginstructionstoaccessmemoryandotherinstructionoperationisperformedintheregisterbetween.

（5）inasimpleandeffectivewaytosupportadvancedlanguage.

7operandtypes:

integer,decimal,floatingpoint（point）,characters,strings,vectors,stacketc..

Therearetwowaystoexpress8,operandtypes:

（1）specifiedbytheoperationcodeencoding.

（2）datacanbeamarkbythehardwaretoexplainthetypeoftheoperandspecifiedbythesetags,soastochoosetheappropriateoperation.

9,theoperandtypesize:

byte（8）,theword（16b）,theword（32b）,doubleword（64b）

Thethirdchapter

1,pipelinetechnology:

referstoarepeatofthetimingprocessisdecomposedintoseveralsubprocesses,andeachprocesscanbeeffectiveinitsspecialfunctionwithotherprocessesexecutingatthesametime.

2,pipelineclassification:

（1）accordingtothefunctionofthenumberofpoints:

singlefunctionpipeline,multifunctionalpipeline;

（2）accordingtotheconnectionbetweenthesametimesegmentstostaticanddynamicpipelinepipeline

（3）accordingtothelinelevel:

componentlevelpipeline（operationline）,pipelinedprocessor（instructionpipelining）,interprocessorpipeline（macropipeline）

（4）accordingtowhetherthereiswaterbetweeneachsectionofafeedbackloop:

linearandnonlinearpipelinepipeline

（5）accordingtothedatarepresentation:

scalarprocessor,vectorprocessor

3,thefirstprocessorcontrollerstructurecomprisesthreeindependentcontrollersandfourbufferstack.Thethreecontroller:

memorycontroller,controller,controlleroperationinstruction.Four:

thefirstinstructionbufferbufferstackstack,linearbufferstack,stackcurrentreadings,thenwritethenumberofstack.

4,thethroughp