Practical 1Introduction to lab hardwaresoftwareWord文档格式.docx
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∙DataInputs:
Din0,Din1
∙SelectInput:
Sel
∙DataOutput:
Dout
ItsLogicFunctionis:
whenSel=0,Dout=Din0;
whenSel=1,Dout=Din1.ItsBooleanLogicEquationis:
Dout=Din0*Sel+Din1*/Sel.Followthenextstepstocreate,designandimplementtheabove2-to-1multiplexer.
DesignSteps
Step1:
CreateanewprojectusingISE:
Clickthestartmenu,andtypeinProject.Thenlookfor"
64-bitProjectNavigator"
andclickonit.YoumayuseotherwayslaunchXilinxISE.
AfterISEislaunched,wewillcreateanewprojectinFile->
NewProject…
Createanewprojectunderthedirectory“C:
\Tem"
oranotherdirectoryofyourchoice,andgivetheprojectadescriptivenamesuchas\Lab0VHDL"
.Westronglyreckonyousaveallyourprojects.Alsosetthe“Top-levelsourcetype:
"
to“HDL"
.Click“Next"
.
TheSpartan3StarterKitPCBboardusesaXilinxSpartan3XC3S200FPGAchipwhichispackagedinaflatthin256-pin(FT256)BallGridArray,somakethefollowingchanges.Click“Next"
whenyouaredone.
Thenextpagedisplaysasummaryofthenewproject.Click“Finish"
whenyou'
redonetoexit.
Step2:
CreatecircuitusingVHDLfile
ClickonProject->
NewSource...
SelectVHDLmoduleandgivethefileanameandclick“Next”.
Addtheportnamesanddirectionsasshown.
Click“Finish"
toexitthewizard.
Addthefollowinglineofcode:
Dout<
=(Din0andnotSel)or(Din1andSel);
SavethefileandproceedtoSynthesize.
Selectthefiletobesynthesizedanddouble-clickon“Synthesize"
.Youcanalsoright-clickon“Synthesize"
andselectRun.
Step3:
InputandOutputPinPlanning
Weneedaconstraintsfiletoensurethatinputsandoutputsgotothedesiredpins.
SelectProject->
Click"
ImplementationConstraintsFile"
intheleftframeandtypeinthenamefortheconstraintsfile,forexample"
mux21"
.Thenclick"
Next"
and"
Finish"
Doubleclickonthe"
I/OPinPlanning(PlanAhead)-Post-Synthesis"
under"
UnderConstraints"
tolaunchPlanAhead.
Step4:
ImplementDesign
Doubleclickon“ImplementDesign”touseyourconstraint
Double-clickon“GenerateProgrammingFile"
togenerateFPGAconfigurationdatafilesuchas“21MUX.bit”.
Step5:
ProgramFPGA
Connectthe5VDCpowercabletothepowerinputonthedemoboard(J4).
ConnectthedownloadJTAG-USBcablebetweenthePCparallelportandthedemoboard(J7).Carefullynotethepositionofthelabelonthecable.
Start“Adept”Software,whichcandownloadthebitfileontotheFPGAthroughJTAG-USBcable.
YoucaneitherchoosetoprogramFPGAforPROM.
VerifyyourimplementationandshowyourresulttotheTutorformarkingwhenyouareready.
Task2:
Implementthenextbasiclogicfunctionsfollowingthesamestepsabove.Youneedtodefineindependentprojectforeachofthefunctionsbelow:
∙ANDGate
∙ORGate
∙NANDGate
∙Exclusive-NORGate
Task3:
Implementthenext74XX30chip:
Task4:
UsetheK-MAPtosimplifytheBooleanfunctioninproductofsums,andimplementthesimplifiedlogic,andverifyitbycomparingwiththeTruthTable.
F(A,B,C,D)=