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片上互连中Premphasis电路的研究与设计
上海交通大学硕士学位论文
片上互连中pre-emphasis电路的研究与设计
硕士研究生：
楼媛
学号：
1102109027
导师：
毛志刚教授
副导师：
蒋剑飞助理研究员
专业：
集成电路工程
所在单位：
微电子学院
答辩日期：
2012年12月
授予学位单位：
上海交通大学
DissertationSubmittedtoShanghaiJiaoTongUniversity
fortheDegreeofMaster
ResearchofDriverPre-emphasisTechniques
forOn-ChipGlobalBuses
Candidate：
YuanLou
StudentID:
1102109027
Supervisor：
Prof.ZhigangMao
AssistantSupervisor:
AssistantProf.JianfeiJiang
Speciality：
IntegratedCircuitEngineering
Affiliation：
SchoolofMicroelectronics
DateofDefence：
Dec,2012
Degree-Conferring-Institution：
ShanghaiJiaoTongUniversity
上海交通大学硕士学位论文
II
RESEARCHOFDRIVERPRE-EMPHASIS
TECHNIQUESFORON-CHIPBUSES
ABSTRACT
WiththedevelopmentofSOCdesigns,moreandmorefunctionalityis
integratedintoasinglechip.Thecomplexityofthesystemonachip
demandsahigherrequirementofon-chipinterconnectbandwidthand
reliability.Withsub-micronprocessscalingtechnology,globalinterconnect
becomesincreasinglyimportantindeterminingthespeedandpowerof
integratedcircuits.Theperformanceofglobalinterconnecthasbecomethe
bottleneckforhigh-speeddatacommunications.
Thethesismainlyfocusesonthedriverpre-emphasisarchitectureof
on-chipinterconnect,whichaimstoimprovetheinterconnectchannel
bandwidthandeliminateinter-symbolinterferencebyemphasizingthe
high-frequencycomponentswhileattenuatinglow-frequencyones.The
researchworkshowedthatthedelayinpre-emphasiscircuitstructurehasa
significantimpactoncircuitperformance.Laplacetransformwasapplied
toanalyzethefrequencyresponsecurve,thusobtainingtheoptimaldelay
forcircuitperformance.Thesimulatingenvironmentisaninterconnect
withthelengthof10mmunder90nmprocess.
Experimentalresultsshowedabetterperformancewhenapplyingour
optimaldelayparameter.Specifically,theunder10
-10
partofBERforoutput
signalwas38.9%forconventionalwireand56.3%forcapacitivelydriven
wire.Therefore,theoptimizedpre-emphasiscircuitcouldeffectively
improvethetransmissionbandwidth.
KEYWORDS:
pre-emphasis,drivercircuit,highspeedinterconnect,
on-chip上海交通大学硕士学位论文
III
第一章绪论······················································································1
1.1片上互连线介绍·········································································1
1.2全局互连线信号传输问题·····························································2
1.2.1延时···················································································3
1.2.2数据传输速率·······································································5
1.2.3信号完整性··········································································6
1.2.4功耗···················································································7
1.3研究意义与目标·········································································8
1.4主要内容与章节安排···································································9
第二章片上信号传输方案···································································11
2.1片上信号传输设计考虑·······························································11
2.1.1电压型和电流型传输技术·······················································11
2.1.2单端互连与差分互连·····························································11
2.2普通的片上传输方法··································································12
2.3低功耗的片上信号传输方法·························································14
2.3.1低摆幅互连·········································································14
2.3.2近光速的信号传输································································14
2.3.3电容驱动技术······································································16
2.3.4脉冲式电流源传输技术··························································17
2.3.53DTSV片上互连技术····························································17
2.3.6片上光互连技术···································································18
2.4Pre-emphasis技术·······································································19
2.4.1脉冲宽度调制（PWM）pre-emphasis技术·····································20
2.4.2同或操作数字控制pre-emphasis技术·········································21
2.4.3电压信号幅度预处理技术·······················································21
2.4.4基于FIR滤波器的pre-emphasis技术········································23
2.5本章小结·················································································25
第三章互连线模型建立······································································26
3.1高速互连发送电路·····································································26上海交通大学硕士学位论文
IV
3.2互连线RC网络·········································································28
3.2.1集总RC模型······································································28
3.2.2分布RC模型······································································29
3.3高速互连接收电路·····································································30
3.3.1灵敏放大器·········································································30
3.3.2判决反馈均衡器···································································32
3.4本章小结·················································································33
第四章基于拉普拉斯变换的理论分析····················································35
4.1信号的拉普拉斯变换··································································35
4.2Pre-emphasis技术的拉普拉斯变换··················································40
4.3信道的拉普拉斯变换··································································41
4.3.1普通传输线（CW）··································································41
4.3.2电容驱动传输线（CDW）··························································42
4.3.3电容-电阻驱动传输线（CRDW）·················································43
4.4本章小结·················································································45
第五章Pre-emphasis电路设计优化························································46
5.1普通传输线发送电路设计优化······················································46
5.1.1理论分析············································································46
5.1.2基于Matlab的仿真优化结果···················································48
5.1.3实际电路设计优化与结果·······················································49
5.2电容驱动传输线发送电路设计优化················································54
5.2.1理论分析············································································54
5.2.2基于Matlab的仿真优化结果···················································55
5.2.3实际电路设计优化与结果·······················································56
5.3本章小结·················································································60
第六章总结与展望············································································61
6.1主要工作与创新点·····································································61
6.2后续研究工作···········································································62
参考文献·····················································································64
致谢····························································································68
攻读硕士学位期间已发表或录用的论文··················································69I
片上互连中pre-emphasis电路的研究与设计
摘要
随着SOC的发展，单个芯片上集成的内核越来越多，片上系统的
复杂化要求片上互连线的传输带宽更宽，可靠性更好。
随着系统集成
规模的扩大和深亚微米集成工艺的发展，虽然标准逻辑单元中采用的
局部互连线长度减小，全局互连线长度却并不随着特征尺寸的缩减而
减小。
随着工艺的发展，全局互连线的性能，如功耗、带宽、延时等，
将会对整个系统有直接的影响。
因此全局互连线的设计与优化对优化
系统的整体性能十分重要。
本课题主要研究在片上互连线中的pre-emphasis技术。
基于FIR
滤波器的pre-emphasis技术通过在数据发送端加强信号的高频分量，
衰减低频分量，能够有效地提高互连带宽，消除码间干扰。
为了更好
地提升pre-emphasis电路的性能，研究发现，pre-emphasis电路结构中
的延时参数对电路性能有着很大的影响。
本文首先通过对传输函数进
行基于拉普拉斯变换的理论分析，研究其频响特性，分析出存在使电
路性能最佳的最优延时。
同时建立了90nm工艺下长度为10mm的互
连线模型，通过实际的电路仿真，分析优化后电路对性能的提升效果。
研究结果表明，采用本文提出的优化的延时参数，普通传输线信
道输出信号的误码率小于10
-10
部分占整个周期的38.9%，电容驱动传
输线信道的误码率小于10
-10
部分占整个周期的56.3%，分别较未优化
前有较大的提高。
因此本文提出的优化设计有效地改善电路性能，提
高信道传输带宽，抑制码间干扰，从而实现片上互连的高速传输。
关键词：
pre-emphasis、驱动电路、高速互连、片上系统上海交通大学硕士学位论文
V
图录
图1-1MOS工艺金属层布线示意图
[3]
·······················································1
图1-2互连线长度与特征尺寸衰减的关系·················································2
图1-3集成RC参数模型·······································································3
图1-4不同工艺节点下互连的相对延时变化
[11]
···········································5
图1-510mm互连线的输入与输出信号
[12]
··················································6
图1-6互连线输出信号眼图
[12]
·································································6
图1-7互连线间的耦合电容····································································7
图1-8传输一位信号所需能量与信号翻转率的关系图
[12]
································8
图2-1缓冲器插入技术········································································12
图2-2互连线的主从驱动器
[8]
································································13
图2-3近光速信号传播电路··································································15
图2-4电容驱动技术电路图··································································16
图2-5电容驱动后的电压摆幅·······························································16
图2-6脉冲式电流源传输模式······························································17
图2-7片上光通信系统的基本框图·························································18
图2-8Pre-emphasis技术基本原理··························································19
图2-9Pre-emphasis处理后的信号
[33]
·······················································20
图2-10脉冲宽度调制pre-emphasis技术电路···········································20
图2-11不同占空比下pre-emphasis信号效果············································22
图2-12数据边沿判断电路及其控制信号·················································22
图2-13同或操作数字控制pre-emphasis驱动电路·····································23
图2-14电压信号幅度预处理电路··························································23
图2-15基于FIR滤滤器的p
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